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As expected KLAC reported earnings at the … Read More
Overall revenues came in at Euro6.7B with EPS at Euro4.81, more… Read More
This past week we … Read More
– SPIE EUV & Photomask conference well attended with great talks
– Chip industry focused on next gen High NA EUV & what it impacts
– Do big chips=big masks? Another Actinic tool?
– AI & chip tools, a game changer- China pre-empting more sanctions
China’s recent achievement of a 7nm-class foundry node using only DUV lithography [1] raises the question of how far DUV lithography can be extended by multipatterning. A recent publication at CSTIC 2023 indicates that Chinese groups are currently looking at extension of DUV-based multipatterning to 5nm, going so far… Read More
Recent articles have focused much effort on studying the stochastic behavior of secondary electron exposure of EUV resists [1-4]. Here, we consider the implications of extending similar treatments to DUV lithography.
As before, the model uses pixel-by-pixel calculations of absorbed photon dose, followed… Read More
Introduction
The ever-growing demand for faster, smaller, and more efficient electronic devices has fueled the semiconductor industry’s relentless pursuit of innovation. One crucial technology at the heart of semiconductor manufacturing is Extreme Ultraviolet Lithography (EUVL) to achieve smaller feature sizes… Read More
Extreme ultraviolet (EUV) lithography is often represented as benefiting from the 13.5 nm wavelength (actually it is a range of wavelengths, mostly ~13.2-13.8 nm), when actually it works through the action of secondary electrons, electrons released by photoelectrons which are themselves released from ionization by absorbed… Read More
High-NA EUV lithography is the anticipated new lithography technology to be introduced for the 2nm node. Essentially, it replaces the 0.33 numerical aperture of current EUV systems with a higher 0.55 numerical aperture (NA). This allows the projection of smaller spot sizes and smaller pitches, roughly 60% smaller compared … Read More
With metal interconnect pitches shrinking in advanced technology nodes, the center-to-center (C2C) separations between vias are also expected to shrink. For a 5/4nm node minimum metal pitch of 28 nm, we should expect vias separated by 40 nm (Figure 1a). Projecting to 3nm, a metal pitch of 24 nm should lead us to expect vias separated… Read More
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The Intel Common Platform Foundry Alliance