You can update ..Generally, I’m a fan of letting market forces figure out best solutions to whatever evolving needs we may have, but I’m enough of a realist to accept that’s not a workable answer to every need. Some problems need a top-down fix. However, we can’t expect policymakers or industry consortia to create compliance demands… Read More
Semiconductor Intellectual Property
Interconnect Basics: Wires to Crossbar to NoC
To many of us, if we ever think about interconnect on an SoC, we may think delay, power consumption, congestion, that sort of thing. All important points from an implementation point of view, but what about the functional and system implications? In the early days, interconnect was very democratic, all wires more or less equal, … Read More
RISC-V SDKs, from IP Vendor or a Third Party?
Like many of us, I’m a fan of open-source solutions. They provide common platforms for common product evolution, avoiding a lot of unnecessary wheel re-invention, over and over again. Linux, TensorFlow, Apache projects, etc., etc. More recently the theme moved into hardware with OpenCores and now the RISC-V ISA. All good stuff.… Read More
CEO Interview: Ted Tewksbury of Eta Compute
Tell me about Eta Compute’s vision?
We envision a world where intelligent devices at the network edge make everyones’ lives safer, healthier, more comfortable, and convenient without sacrificing privacy and security.
How do you hope to achieve this?
We achieve this by providing the lowest power and most energy efficient machine… Read More
New Processor Helps Move Inference to the Edge
Many of the most compelling applications for Artificial Intelligence (AI) and Machine Learning (ML) are found on mobile devices and when looking at the market size in that arena, it is clear that this is an attractive segment. Because of this, we can expect to see many consumer devices having low power requirements at the edge with… Read More
WEBINAR: Security Verification of Root of Trust for Xilinx
Tortuga Logic is hosting a webinar on Tuesday, August 18th from 12 to 1PM PDT, in which Xilinx will present their experiences in using the Tortuga Logic Radix-S and Radix-M products for security verification of root of trust in their advanced SoC FPGAs. REGISTER HERE to attend the webinar.
SECURITY CHALLENGES
In general security… Read More
All-In-One Extreme Edge with Full Software Flow
What do you do next when you’ve already introduced an all-in-one extreme edge device, supporting AI and capable of running at ultra-low power, even harvested power? You add a software flow to support solution development and connectivity to the major clouds. For Eta Compute, their TENSAI flow.
The vision of a trillion IoT… Read More
Webinar Replay – Designing and Verifying HBM ESD Protection Networks
Every chip needs ESD protection, especially RF, analog and nm designs. Because each type of design has specific needs relating to IOs, pad rings, operating voltage, process, etc. it is important that the ESD protection network is carefully tailored to the design. Also because of interactions between the design and its ESD protection… Read More
Low Power and RISC-V Talks at DAC2020, Hosted by Mentor
I’m going to get to low power and RISC-V, but first I’m trying out virtual DAC this year. Seems to be working smoothly, aside from some glitches in registration. But maybe that’s just me – I switched email addresses in the middle of the process. Some sessions are live, many pre-recorded, not quite the same interactive experience… Read More
Synopsys Webinar: A Comprehensive Overview of High-Speed Data Center Communications
High-speed communication is a critical component for many applications, most notably in the data center. The serializer/deserializer physical interface, or SerDes PHY is the backbone of many different forms of high-speed communication for this application. Use cases include on chip, between chips, between boards and racks… Read More
Should Intel be Split in Half?