When Steve Jobs made it clear at the 1997 Apple Worldwide Developer Conference he was taking back his company, he tossed the now famous line in his opening monologue: “Focusing is about saying no.” Approaching 20 years later, that decision still reverberates.… Read More
Semiconductor Intellectual Property
Processors, Processors, Processors Everywhere
At first glance a processor conference might seem a bit arcane, however we live in an era where processors are ubiquitous. There is hardly any aspect of our lives that they do not touch in some way. Last week at the Linley Processor Conference the topics included deep learning, autonomous driving, energy, manufacturing, smart cities,… Read More
Free Copy of Mobile Unleashed: The History of ARM!
As most of you know SemiWiki published a book which is a really nice history of ARM. We have received many compliments on it and we are very proud. As a thank you to all SemiWiki members I would like to offer a free electronic version of the book (PDF). You can access it via the attachment at the bottom of this wiki:
SiFive execs share ideas on their RISC-V strategy
Since its formation just last year, SiFive has been riding the RISC-V rocket from purely academic interest to first commercialization. In an exclusive discussion, I talked with CEO Stefan Dyckerhoff and VP of Product and Business Development Jack Kang about their progress so far and what may be coming next.
Previously, I covered… Read More
Could Machine Learning be Available for Mass Market?
Machine Learning is at the hype peak, according with Gartner’s August 2016 Hype Cycle for Emerging Technologies. The demand for vision processor IP is strong in smartphone, automotive and consumer electronics segments. ASSP based solutions can make the job, but how can OEM create differentiation, control their destiny and … Read More
CCIX shows up in ARM CMN-600 interconnect
All the hubbub about FPGA-accelerated servers prompts a big question about cache coherency. Performance gains from external acceleration hardware can be wiped out if the system CPU cluster is frequently taking hits from cache misses after data is worked on by an accelerator.
ARM’s latest third-generation CoreLink CMN-600 … Read More
Cadence DSPs float for efficiency in complex apps
Floating-point computation has been a staple of mainframe, minicomputer, supercomputer, workstation, and PC platforms for decades. Almost all modern microprocessor IP supports the IEEE 754 floating-point standard. Embedded design, for reasons of power and area and thereby cost, often eschews floating-point hardware… Read More
16nm HBM Implementation Presentation Highlights CoWoS During TSMC’s OIP
Once a year, during the TSMC’s Open Innovation Platform (OIP) Forum you can expect to see cutting edge technical achievements by TSMC and their partners. This year was no exception, with Open-Silicon presenting its accomplishments in implementing an HBM reference design in 16nm. It’s well understood that HBM offers huge benefits… Read More
It’s a heterogeneous world and cache rules it now
Cache evolved when the world was all about homogeneous processing and slow and expensive shared memory. Now, compute is just part of the problem – devices need to handle display, connectivity, storage, and other tasks, all at the same time. Different, heterogeneous cores handle different workflows in the modern SoC, and the burden… Read More
eSilicon Revolutionizes Semiconductor IP Selection and Purchasing!
Design starts are the lifeblood of the semiconductor industry which is why we have been following the eSilicon STAR Platform since its introduction with great anticipation. The STAR platform was first launched about three years ago. Today, there are over 1,300 registered STAR users in 52 countries around the world.
The ASIC business… Read More
Rapidus, IBM, and the Billion-Dollar Silicon Sovereignty Bet