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FPGA
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High Level Synthesis. Are We There Yet?

High Level Synthesis. Are We There Yet?
by Paul McLellan on 06-16-2015 at 7:00 am
Categories: Cadence, STMicroelectronics, Synopsys, Xilinx

High level synthesis (HLS) seems to have been part of the backdrop of design automation for so long that it seems to be one of those things that nobody notices any more. But it has also crept up on people and gone from interesting technology to keep an eye on to getting genuine adoption. The first commercial product in the space was behavioral… Read More

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Why is Intel going inside Altera for Servers?

Why is Intel going inside Altera for Servers?
by Eric Esteve on 06-02-2015 at 12:30 pm
Categories: Foundries, FPGA, Intel

You should be happy to listen that Intel will buy Altera FPGA challenger, if you expect always more power to be consumed in datacenter! In 2013 the power consumption linked with the Servers and Storage IC activity, plus the electricity consumed in the systems cooling these high performance chips has reached 91 BILLION KWh (or the… Read More

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Aldec packs 6 UltraScale parts on HES-7

Aldec packs 6 UltraScale parts on HES-7
by Don Dingee on 06-01-2015 at 12:00 pm
Categories: Aldec, EDA, FPGA

A few months ago, when the Xilinx UltraScale VU440 FPGA began shipping, one of the immediate claims was a quad-FPGA-based prototyping board touted as “Godzilla’s Butcher on Steroids”. That was a refreshing and creative PR approach, frankly. I’m always careful with less creative terms like “world’s biggest” or “world’s fastest”,… Read More

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Will Dark Silicon Dictate Server Blade Architecture?

Will Dark Silicon Dictate Server Blade Architecture?
by Tom Simon on 05-27-2015 at 7:00 pm
Categories: EDA, FPGA

Does the evil sounding phenomenon known as Dark Silicon create a big opportunity for FPGA vendors as was predicted recently by Pacific Crest Securities? John Vinh posits that using multiple cores as a method of scaling throughput is flattening out, and the use of FPGA’s to perform computation can help off-load and thus overcome… Read More

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Taking a Leap Forward to Prototype Billion Gate Designs

Taking a Leap Forward to Prototype Billion Gate Designs
by Pawan Fangaria on 05-26-2015 at 12:00 pm
Categories: EDA, FPGA, S2C EDA

It’s very common these days to hear about a billion gates SoC, but not without a huge design and verification effort and investment of resources. A complete verification of such an SoC needs several verification steps including software and hardware based methodologies that often are not sufficient to cover the whole SoC. In order… Read More

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Realize the Genius of Your Design!

Realize the Genius of Your Design!
by Daniel Nenni on 05-21-2015 at 1:00 pm
Categories: EDA, FPGA, S2C EDA

I think we can all agree that no matter what you are designing, FPGA prototyping can help. The challenge is getting the most out of the leading edge FPGA prototyping solutions and that requires a detailed understanding of how this technology works and what FPGA prototyping solutions match your design and verification requirements.… Read More

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S2C’s Virtex UltraScale Prototyping Provides Designers Much Needed Flexibility

S2C’s Virtex UltraScale Prototyping Provides Designers Much Needed Flexibility
by Majeed Ahmad on 05-18-2015 at 12:00 pm
Categories: EDA, FPGA, S2C EDA

The advent of large system-on-chip (SoC) designs has brought FPGA prototyping hardware into the limelight and the launch of S2C Inc.’s Single VU440 Prodigy Logic Module just shows how far off-the-shelf prototyping has come in a bid to complement hardware verification and software development. Hardware verification… Read More

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Breaking the SoC lab walls

Breaking the SoC lab walls
by Don Dingee on 05-11-2015 at 7:00 am
Categories: EDA, FPGA, S2C EDA

There used to be this thing called the “computer lab”, with glowing rows of terminals connected to a mainframe or minicomputer. Computers required a lot of care and feeding, with massive cooling and power requirements. Microprocessors and personal computers appeared in the 1970s, with much smaller and less expensive machines… Read More

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New Vivado release goes from Lab to UltraScale

New Vivado release goes from Lab to UltraScale
by Don Dingee on 05-06-2015 at 1:00 am
Categories: FPGA, Xilinx

Xilinx users will welcome the brand-new release of Vivado Design Suite 2015.1. For openers, device support for the latest FPGAs in the UltraScale family – XCVU440, XCVU190, and XCVU125 – has been added in the release, and early access code for the XCVU160 is available from a local Xilinx FAE. Installation has been streamlined, … Read More

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MIPI CSI-2 and DSI IP? Better with FPGA Prototyping Set

MIPI CSI-2 and DSI IP? Better with FPGA Prototyping Set
by Eric Esteve on 05-05-2015 at 7:00 am
Categories: EDA, FPGA, S2C EDA

Sourcing MIPI CSI-2 or DSI IP to a respected IP vendor is mandatory to build a peripheral IC or a SoC targeting mobile application as the chip maker simply can’t afford to do a re-spin because of Time-To-Market imperative. Buying this IP to a vendor also offering MIPI powered FPGA Prototyping Platforms is even better! Northwest Logic… Read More