You are currently viewing SemiWiki as a guest which gives you limited access to the site. To view blog comments and experience other SemiWiki features you must be a registered member. Registration is fast, simple, and absolutely free so please,
join our community today!
WP_Term Object
(
[term_id] => 50
[name] => Events
[slug] => events
[term_group] => 0
[term_taxonomy_id] => 50
[taxonomy] => category
[description] =>
[parent] => 0
[count] => 1375
[filter] => raw
[cat_ID] => 50
[category_count] => 1375
[category_description] =>
[cat_name] => Events
[category_nicename] => events
[category_parent] => 0
[is_post] =>
)
All-Digital In-Memory Computingby Tom Dillinger on 03-15-2021 at 6:00 amCategories: Events, Foundries, TSMC
Research pursuing in-memory computing architectures is extremely active. At the recent International Solid State Circuits conference (ISSCC 2021), multiple technical sessions were dedicated to novel memory array technologies to support the computational demand of machine learning algorithms.
The inefficiencies associated… Read More
Data protection is on everyone’s mind these days. The news cycle seems to contain a story about hacking, intrusion or cyber-terrorism on a regular basis. The cloud, our hyperconnected devices and the growing reliance on AI-assisted hardware to manage more and more mission critical functions all around us make data protection… Read More
Register File Design at the 5nm Nodeby Tom Dillinger on 03-10-2021 at 2:00 pmCategories: Events, Foundries, TSMC
“What are the tradeoffs when designing a register file?” Engineering graduates pursuing a career in microelectronics might expect to be asked this question during a job interview. (I was.)
On the surface, one might reply, “Well, a register file is just like any other memory array – address inputs, data inputs and outputs, read/write… Read More
Paul Cunningham, CVP and GM of the System Verification Group at Cadence gave the afternoon Keynote on Tuesday at DVCon and doubled down on his verification-throughput message. At the end of the day, what matters most to us in verification is the number of bugs found and fixed per dollar per day. You can’t really argue with that message.… Read More
At the recent ISSCC conference, Mozhgan Mansuri from Intel gave an enlightening (extended) short course presentation on all thing related to clocking, for both wireline and wireless interface design. [1] The presentation was extremely thorough, ranging from a review of basic clocking principles to unique circuit design … Read More
The emergence of advanced packaging technologies has led to the introduction of new types of data communication interfaces. There are a number of topologies that are defined by the IEEE 802.3 standard, as well as the Optical Internetworking Common Electrical I/O CEI standard. [1,2] (Many of the configurations of interest … Read More
mmWave design has traditionally been a boutique technology used in satellite and defense applications. Lately that’s changing. It turns out the complex, high frequency capabilities of mmWave technology are a key enabler for the 5G wireless networks being deployed today. I discussed some of this backstory in a recent post about… Read More
Perforce recently held their virtual Embedded DevOps Summit. There was a lot of great presentations across many disciplines. Of particular interest to me, and likely to the SemiWiki readership as well, was a presentation by Warren Savage entitled Secure Collaboration on a Cloud-based Chip Design Environment. I’ll provide … Read More
Resistive RAM (ReRAM) technology has emerged as an attractive alternative to embedded flash memory storage at advanced nodes. Indeed, multiple foundries are offering ReRAM IP arrays at 40nm nodes, and below.
ReRAM has very attractive characteristics, with one significant limitation:
- nonvolatile
- long retention time
- extremely
…
Read More
Radiation hardening is admittedly not a challenge every SoC design team faces. Methods to address this challenge typically involve a new process technology, a new library or both. Trusted, secure design is something more design teams worry about and that number is growing as our interconnected world creates new and significant… Read More
Flynn Was Right: How a 2003 Warning Foretold Today’s Architectural Pivot