The first AI Generated Open-Source Silicon Design Challenge invited participants to use generative AI to design an open-source silicon chip and tape it out in just three weeks. The contestants were required to create Verilog code from natural language prompts, and then implemented their designs using the chipIgnite platform… Read More
Intel Internal Foundry Model Webinar
Intel held a webinar today to discuss their IDM2.0 internal foundry model. On the call were Dave Zinsner Executive Vice President and Chief Financial Officer and Jason Grebe Corporate Vice President and General Manager of the Corporate Planning Group.
On a humorous note, the person moderating the attendee questions sounded … Read More
Keynote Sneak Peek: Ansys CEO Ajei Gopal at Samsung SAFE Forum 2023
As one of the world’s leading chip foundries, Samsung occupies a vital position in the semiconductor value chain. The annual Samsung Advanced Foundry Ecosystem (SAFE™) Forum is a must-go event for semiconductor and electronic design automation (EDA) professionals. Ajei Gopal, President and CEO of Ansys, has the honor of delivering… Read More
WEBINAR: Revolutionizing Chip Design with 2.5D/3D-IC Design Technology
In the 3D-IC (Three-dimensional integrated circuit) chip design method, chiplets or wafers are stacked vertically on top of each other and are connected using Through Silicon Vias (TSVs) or hybrid bonding.
The 2.5D-IC design method places multiple chiplets alongside each other on a silicon interposer. Microbumps and interconnect… Read More
VLSI Symposium – Intel PowerVia Technology
At the 2023 VLSI Symposium on Technology and Circuits, Intel presented two papers on their PowerVia technology. We received a pre-conference briefing on the technology embargoed until the conference began and received the papers.
Traditionally all interconnects have taken place on the front side of devices with signal and … Read More
Nominations for Phil Kaufman Award, Phil Kaufman Hall of Fame Close June 30
Plan ahead now because Friday, June 30, is the deadline to submit nominations for the Phil Kaufman Award and the Phil Kaufman Hall of Fame for anyone you think is deserving of these honors. If you haven’t given it any thought, please consider nominating someone.
Before we look at both and the nomination requirements, here’s a thumbnail… Read More
PCI-SIG DevCon and Where Samtec Fits
PCIe (peripheral component interconnect express) is an interface standard for connecting high-speed components contained in PCs, MACs and other types of processors. Think graphics, storage arrays, Wi-Fi and the like. This communication standard has become incredibly popular. The first version of the standard was released… Read More
TSMC Clarified CAPEX and Revenue for 2023!
TSMC clarified CAPEX and revenue for 2023 last night at the Annual Shareholders Meeting. Last year TSMC guided up during this meeting but this year they guided down. CAPEX was guided down to the lower end of $36B-$32B. Revenue was guided down from low-single to mid-single digit so maybe down another percent or two. The TSMC Jan… Read More
WEBINAR: UCIe PHY Modeling and Simulation with XMODEL
Join this webinar and see UCIe in action! This webinar presents the SystemVerilog models of a Universal Chiplet Interconnect Express (UCIe) interface, including both the analog circuits in the electrical layer and digital FSMs in the logical layer. The whole physical layer (PHY) model can be efficiently simulated in SystemVerilog,… Read More
WEBINAR: Driving Forward with UWB Radar: Enhancing Child Safety in Automotive
The rapid advancement of UWB (Ultra-Wideband) wireless technology has garnered significant attention and interest, thanks to its adoption by leading smartphone brands and its versatile range of applications. Within the automotive industry, UWB has already emerged as the preferred choice for Digital Keys in the premium… Read More


CEO Interview with Jerome Paye of TAU Systems