The NFL has its annual Super Bowl contest each year, EDA vendors attend DAC, then the test folks attend ITCwhich was in Anaheim a few weeks ago. I’ve marketed ATGP, BIST and DFT tools before so I like to keep updated on what’s happening at conferences like ITC. Robert Ruiz from Synopsys spoke with me by phone to provide … Read More
Why FPGA synthesis with Synplify is now faster
The headline of the latest Synopsys press release drops quite a tease: the newest release of Synplify delivers up to 3x faster runtime performance in FPGA synthesis. In our briefing for this post, we uncovered the surprising reason why – and it’s not found in their press release.… Read More
FinFET Reliability Analysis with Device Self-Heating
At the recent TSMC OIP symposium, a collaborative presentation by Synopsys and Xilinx highlighted the importance of incorporating the local FinFET device self-heating temperature increase on the acceleration of device reliability mechanisms.… Read More
SpyGlass World at Levi Stadium, October 21st
I suppose you might have something better to do next Wednesday but, seriously, it had better be pretty good. I admit I’m biased (I was the Atrenta CTO until very recently) but even given that and mixing metaphors, Atrenta really knocked it out of the park when they got the 49er stadium for their User Group meetings. You don’t have to … Read More
Leveraging Synopsys’ Lynx Design System for SoC Designs on Advanced Nodes
There was a time when design goals were decided in the beginning, targeted on a particular technology node, design planning done for the same, and implementation done through point tools connected indesign flows customized according to the design. It’s no longer the case for modern SoC designs; there are multiple technology … Read More
Automotive MCU code fault-busting with vHIL
With electronic and software content in vehicles skyrocketing, and the expectations for flawless operation getting larger, the need for system-level verification continues to grow. Last month, we looked at a Synopsys methodology for virtual hardware in the loop, or vHIL… Read More
FPGA Prototyping: From Homebrew to Integrated Solutions
Years ago, when FPGA prototyping started, there were no solutions that you could go out and buy and everything was created as a one-off: buy some FPGAs or an FPGA-based board, and put it all together. It was a lot of effort, nobody really knew in advance how long it would take, there was very limited visibility for debug and the whole … Read More
Michael Sanie Plays the Synopsys Verification Variations
I met Michael Sanie last week. He is in charge of verification marketing at Synopsys. I know him well since he worked for me at both VLSI Technology and Cadence. In fact his first job out of college was to take over support of VLSIextract (our circuit extractor), which I had written. But we are getting ahead.
Michael was born in Iran and… Read More
Simulating to a fault in automotive and more
We’re putting the finishing touches on Chapter 9 of our upcoming book on ARM processors in mobile, this chapter looking at the evolution of Qualcomm. One of the things that made Qualcomm go was their innovative use of digital simulation. First, simulation proved out the Viterbi decoder (which Viterbi wasn’t convinced had a lot … Read More
Synopsys Q3 Results
Synopsys announced their quarterly results this afternoon. It is the end of their Q3 (yes, they are not on the regular calendar year. Neither, for that matter, is Mentor who announce tomorrow). On the earnings call Aart started off:Good afternoon. I’m happy to report that our third quarter results were very strong, as we achieved… Read More