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A Fresh Look at HLS Value

A Fresh Look at HLS Value
by Bernard Murphy on 06-21-2022 at 6:00 am

Streaming min

I’ve written several articles on High-Level Synthesis (HLS), designing in C, C++ or SystemC, then synthesizing to RTL. There is unquestionable appeal to the concept. A higher level of abstraction enables a function to be described in less lines of code (LOC). Which immediately offers higher productivity and implies less bugs… Read More


Casting Light on OpenLight’s Open Silicon Photonics Platform

Casting Light on OpenLight’s Open Silicon Photonics Platform
by Kalar Rajendiran on 06-20-2022 at 6:00 am

The Growing Silicon Photonics Market

For many decades now, modern optical technology has been deployed in networking infrastructure, for long haul and medium haul links to support internet communications. The foundation of this technology is photonics, which is the science of generation, manipulation and detection of light for performing functions otherwise… Read More


HLS in a Stanford Edge ML Accelerator Design

HLS in a Stanford Edge ML Accelerator Design
by Bernard Murphy on 06-16-2022 at 6:00 am

AI for stanford min

I wrote recently about Siemens EDA’s philosophy on designing quality in from the outset, rather than trying to verify it in. The first step is moving up the level of abstraction for design. They mentioned the advantages of HLS in this respect and I refined that to “for DSP-centric applications”. A Stanford group recently presented… Read More


Seeing 1/f noise more accurately

Seeing 1/f noise more accurately
by Don Dingee on 06-15-2022 at 10:00 am

Decimation chain speeds up measurements for 1/f noise

Electronics noise is often described as “white,” spread evenly across a band, typical on older semiconductor processes where thermal and shot noise dominate. As transistors shrink, “pink” 1/f noise takes over at low frequencies – becoming stronger in advanced processes and quantum computing technology. But it’s not an easy… Read More


A Different Perspective: Ansys’ View on the Central Issues Driving EDA Today

A Different Perspective: Ansys’ View on the Central Issues Driving EDA Today
by John Lee on 06-14-2022 at 6:00 am

RedHawk SC uses Ansys SeaScape Big Data Platform Designed for EDA Applications

For the past few decades, System-on-Chip (SoC) has been the gold standard for optimizing the performance and cost of electronic systems. Pulling together practically all of a smartphone’s digital and analog capabilities into a monolithic chip, the mobile application processor serves as a near-perfect example of an SoC. But… Read More


Standardization of Chiplet Models for Heterogeneous Integration

Standardization of Chiplet Models for Heterogeneous Integration
by Tom Dillinger on 06-09-2022 at 10:00 am

Chiplets

The emergence of 2.5D packaging technology for heterogeneous die integration offers significant benefits to system architects.  Functional units may be implemented using discrete die – aka “chiplets” – which may be fabricated in different process nodes.  The power, performance, and cost for each unit may be optimized separately.… Read More


RISC-V embedded software gets teams coding faster

RISC-V embedded software gets teams coding faster
by Don Dingee on 06-07-2022 at 10:00 am

Nucleus RTOS

RISC-V processor IP is abundant. Open-source code for RISC-V is also widely available, but typically project-based code solves one specific problem. Using only pieces of code, it’s often up to a development team integrate a complete application-ready stack for creating an embedded device. A commercial embedded software development… Read More


Advanced Packaging Analysis at DesignCon

Advanced Packaging Analysis at DesignCon
by Tom Dillinger on 06-07-2022 at 10:00 am

meshing

The slogan for the DesignCon conference has been “where the chip meets the board”.  Traditionally, the conference has provided a breadth of technical presentations covering the design and analysis of high-speed communication interfaces and power integrity evaluations between chip, board, and system.

The recent DesignCon… Read More


DesignDash: ML-Driven Big Data Analytics Technology for Smarter SoC Design

DesignDash: ML-Driven Big Data Analytics Technology for Smarter SoC Design
by Kalar Rajendiran on 06-06-2022 at 10:00 am

DesignDash Better Decisions Faster

With time-to-market pressures ever increasing, companies are continually seeking enhanced designer productivity, faster design closure and improved project management efficiency. To accomplish these, organizations invest a lot in implementing both standardized approaches and proprietary techniques. With ever increasing… Read More


Leveraging Simulation to Accelerate the Design of Plasma Reactors for Semiconductor Etching Processes

Leveraging Simulation to Accelerate the Design of Plasma Reactors for Semiconductor Etching Processes
by Kalar Rajendiran on 06-03-2022 at 6:00 am

Etching Processes

There is no shortage of reporting on the many technological advances happening within the semiconductor industry. But sometimes it feels like we hear less in the area of semiconductor manufacturing equipment than in the design and product arenas. That doesn’t mean that there is less happening there or what is happening there … Read More