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Electronic Design Automation
Formal verification at the SoC level has long seemed an unapproachable requirement. Maybe we should change our approach. Could formal be practical on a suitable abstraction of the SoC? Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and now Silvaco CTO) and… Read More
S2C’s Shines at DAC 2022 with its New Prodigy Player Pro-7 Prototyping Software, Multi-FPGA Prototype Hardware Platforms, and Complete Prototyping Solutions
The 59th Design Automation Conference returned to San Francisco’s Moscone Center this year to notch almost six decades of week-long immersion in EDA technology and … Read More
In 2022 using the cloud for EDA tasks is a popular topic, and at DAC this year I could see a bigger presence from the cloud hardware vendors in the exhibit area, along with a growing stampede of EDA companies. Tuesday at DAC there was a luncheon with experts from Siemens EDA, Google and AMD talking about surge compute. I already knew Michael… Read More
There is a major shift in innovation occurring all around us. We see the results every day. We can interact with them in an easier, more intuitive way. They deliver insights about our health and our daily habits. All this can be categorized as a move towards Smart Everything – ubiquitous machine-assisted intelligence for the good… Read More
In the flood of CPU and GPU announcements in pursuit of new technology advances, it is easy to lose track of another kind of platform – DSPs. Digital signal processors, once a niche platform for specialized applications, are now front and center in some of the hottest technologies. Because their strength in signal processing has… Read More
At least once if not more, many of us may have faced the following situation. We download the latest software driver for a device only to find out after installing that it doesn’t work for your hardware. As per the release notes, it should work for your hardware but in reality it does not. We have no choice but to revert back to the earlier… Read More
The incessant demand for faster data rates across a wide range of end applications has led to the development of the most recent generation of SerDes hardware, achieving 112Gbps. For example, network switches in datacenter architectures are starting to provide 51T throughput utilizing these new 112Gbps implementations (51.2Tbps… Read More
It’s the second day of DAC, and the announcements are coming in at a fast pace, so stay tuned to SemiWiki for all of the latest details. As a long-time SPICE user and industry follower, I’ve witnessed the progression as EDA vendors have connected their SPICE simulators to digital simulators, opening up a bigger world… Read More
When I worked at EDA vendors and attended DAC, one of the most popular questions asked in the booth and suites was simply, “What’s new this year?” It’s a fair question, and yet many semiconductor professionals are so focused on their present project, using their familiar methodology, that they simply… Read More
“Who guards the guardians?” This is a question from Roman times which occurred to me as relevant to this topic. We use constrained random to get better coverage in simulation. But what ensures that our constrained random testbenches are not wanting, maybe over constrained or deficient in other ways? If we are improving with a faulty… Read More
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