SiC 800 Jan2025Deadline Static
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Time in a model: xtUML and concurrency

Time in a model: xtUML and concurrency
by Don Dingee on 01-27-2013 at 9:00 pm

Most embedded programming strategies involve decomposing the embedded application into chunks, which can then be executed as independent tasks. More advanced applications involve some type of data flow, and may attempt to execute operations in parallel where possible.… Read More


Cadence, Synopsys, and Mentor on FinFETs

Cadence, Synopsys, and Mentor on FinFETs
by Daniel Nenni on 01-27-2013 at 7:00 pm

In my opinion, FinFETs will be the most significant piece of technology we, as semiconductor ecosystem people, will experience this decade. Seriously this is exciting stuff and one of the top search terms on SemiWiki for 6 months running. Here is a quick peek at what the top EDA companies will be talking about at the Common PlatformRead More


High Performance or Cycle Accuracy? You can have both

High Performance or Cycle Accuracy? You can have both
by Daniel Payne on 01-26-2013 at 10:55 pm

SoC designers have always wanted to simulate hardware and software together during new product development, so one practical question has been how to trade off performance versus accuracy when creating an early model of the hardware. The creative minds at Carbon Design Systems and ARM have combined to offer us some hope and relief… Read More


You may want to check that known-good RTL

You may want to check that known-good RTL
by Don Dingee on 01-23-2013 at 1:00 pm

In his blog Coding Horror, Jeff Atwood wrote: “Software developers tend to be software addicts who think their job is to write code. But it’s not. Their job is to solve problems.” Whether the tool is HTML, C, or RTL, the reality is we are now borrowing or buying more software IP than ever, and integrating it into more complex designs,… Read More


Using IC Data Management Tools and Migrating Vendors

Using IC Data Management Tools and Migrating Vendors
by Daniel Payne on 01-23-2013 at 10:50 am

Non-volatile memory is used in a wide variety of consumer and industrial applications and comes in an array of architectures like Serial Flash and CBRAM (Conductive Bridging RAM). I caught up with Shane Hollmer by phone this week to gain some insight into a recent acquisition of Atmel’s serial flash components, and how that… Read More


Verdi: No Requiem for Openness

Verdi: No Requiem for Openness
by Paul McLellan on 01-22-2013 at 8:10 pm

I sat down last week for lunch with Michael Sanie. Mike and I go back a long way, working together at VLSI Technology (where his first job out of school was to take over the circuit extractor that I’d originally written) and then in strategic marketing at Cadence. Now Mike has marketing for (almost?) all of Synopsys’s … Read More


New PCI Express 3.0 Equalization Requirements

New PCI Express 3.0 Equalization Requirements
by Eric Esteve on 01-22-2013 at 9:18 am

PCI Express 3.0 increased the supported data rate to 8 Gbps, which effectively doubles the data rate supported by PCI Express 2.0. While the data rate was increased, no improvement was made to the channels. As such, an 8 Gbps channel in PCIe 3.0 experiences significantly more loss than one implemented in PCIe 2.0. To compensate for… Read More


First Time, Every Time

First Time, Every Time
by SStalnaker on 01-21-2013 at 7:10 pm

While this iconic advertising phrase was first used to describe the ink reliability of a ballpoint pen, it perfectly summarizes the average consumer’s attitude toward automobile reliability as well. We don’t really care how it’s done, as long as everything in our car works first time, every time. Even when that includes heated… Read More


Double Patterning for IC Design, Extraction and Signoff

Double Patterning for IC Design, Extraction and Signoff
by Daniel Payne on 01-21-2013 at 3:27 pm

TSMC and Synopsys hosted a webinar in December on this topic of double patterning and how it impacts the IC extraction flow. The 20nm process node has IC layout geometries so closely spaced that the traditional optical-based lithography cannot be used, instead lower layers like Poly and Metal 1 require a new approach of using two… Read More