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Electronic Design Automation
Overshadowing the acquisition of Denali by Cadence, Synopsys, the #2 semiconductor IP provider acquires Virage Logic, the #3 IP provider. Virage brings the #1 embedded SRAM, #1 BIST, #1 Logic Libraries, #1 DDR, #1 NVM, the ARC CPU cores and audio/video interface technology, and all the AMS IP from the NXP acquisition.
Under the… Read More
As a quick follow-up to my blog TSMC Extends Open Innovation Platform, TSMC today announced the Analog/Mixed Signal Reference Flow 1.0., another key collaborative component of TSMC’s Open Innovation Platform™.
The TSMC AMS Design Flow 1.0’s design package is integrated seamlessly on top of the 28nm interoperable process design… Read More
TSMC today extended one of the most effective semiconductor design enablement initiatives the semiconductor world has ever seen, the Open Innovation Platform (OIP). Morris Chang coined the term “OIP” himself in 2008, but the effort itself is 10+ years old with a collective cost > .5B$. My other blogs on topic include: TSMC … Read More
As mentioned in previous blogs, design enablement is a key enabler to fabless semiconductor design and manufacture, without question. The purpose of this blog (in 500 words) is to compare and contrast two very different design enablement strategies and engage the semiconductor community in a meaningful discussion.
The GlobalFoundry… Read More
Launched in April 2008, the TSMC OIP initiative is a collaborative strategy aimed at breaking down the barriers of semiconductor design enablement in order to reduce waste and increase the profitability of the industry as a whole.
The TSMC Open Innovation Platform promotes timeliness-driven innovation amongst the semiconductor… Read More
“Cadence Design Systems, Inc. (NASDAQ: CDNS), the global leader in EDA360………”
Of course, why wouldn’t Cadence be the global leader in something they just made up? As a follow-up to my yawningly successful blog Cadence EDA360 Manifesto:
One of the problems I have with EDA360 is the fear, uncertainty, and doubt (FUD) it attempts … Read More
EDA360 is said to be a blueprint or high-level vision for the EDA industry and not a Cadence specific document, based on the challenges that customers are experiencing. What EDA36o really is, is a manifesto, a public declaration of intentions, opinions, objectives, or motives, issued by a specific organization. The question … Read More
Moore slightly altered the formulation of the law over time, bolstering the perceived accuracy of Moore’s law in retrospect. Most notably, in 1975, Moore altered his projection to a doubling every two years. Despite popular misconception,… Read More
It was a pleasure to see the GlobalFoundries (GFI) corporate pitch at the Mentor Graphics U2U Conference last week. Wally Rhines is a tough act to follow but Mojy Chian, Senior Vice President of Design Enablement at GlobalFoundries, presented a compelling argument for a refined foundry business model. The GFI people were also … Read More
This blog is a follow-up to my second most viewed page Moore’s Law and 40nm Yield, with a strong recommendation of how to design for yield at the advanced nodes (32/28/22nm) with Verify High-Sigma design technology.
Case in point: Circuit blocks such as complex standard cells or memory bit cells are repeated thousands or even millions… Read More
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China Chip Equip Embargo just got real