Synopsys IP Designs Edge AI 800x100
WP_Term Object
(
    [term_id] => 157
    [name] => EDA
    [slug] => eda
    [term_group] => 0
    [term_taxonomy_id] => 157
    [taxonomy] => category
    [description] => Electronic Design Automation
    [parent] => 0
    [count] => 4282
    [filter] => raw
    [cat_ID] => 157
    [category_count] => 4282
    [category_description] => Electronic Design Automation
    [cat_name] => EDA
    [category_nicename] => eda
    [category_parent] => 0
    [is_post] => 
)

Automotive MCU code fault-busting with vHIL

Automotive MCU code fault-busting with vHIL
by Don Dingee on 09-30-2015 at 7:00 pm

With electronic and software content in vehicles skyrocketing, and the expectations for flawless operation getting larger, the need for system-level verification continues to grow. Last month, we looked at a Synopsys methodology for virtual hardware in the loop, or vHIL… Read More


IoT need Low-cost, Low-power…and Silicon Proven IP

IoT need Low-cost, Low-power…and Silicon Proven IP
by Eric Esteve on 09-30-2015 at 4:00 pm

Today, IoT devices are available in our daily life through wearable, smart appliances or metering application and some prediction call for 33 billion connected objects, 25 billion being IoT by 2020 (Gartner, 2014). Being very synthetic, IoT device (smart appliance or wearable object) will be wirelessly and securely connected… Read More


Indian Railways and SoCs

Indian Railways and SoCs
by Sivakumar P R on 09-29-2015 at 4:00 pm

Last week I woke up late as usual and decided to flip through the news paper on Coffee to enjoy the lazy Sunday morning, but I ended up reading a sad news about a train accident. Everyday virtually we hear about minimum one accident. Indian Railways, wow, what a reliable transportation system we have built. It clearly indicates we have… Read More


Prototyping the Future of Semiconductors!

Prototyping the Future of Semiconductors!
by Daniel Nenni on 09-28-2015 at 12:00 pm

With major semiconductor mergers and acquisitions running rampant in 2015 (more than double the M&A activity in 2014), the question is where will we go from here? There are many different ways to slice this but for this blog let’s talk about the thousands of semiconductor professionals that will be changing jobs as a result … Read More


Nine Cost Considerations to Keep IP Relevant

Nine Cost Considerations to Keep IP Relevant
by Pawan Fangaria on 09-27-2015 at 12:00 pm

It’s about 15 years the concept of IP development and its usage took place. In the recent past the semiconductor industry witnessed start of a large number of IP companies across the globe. However, according to Gary Smith’s presentation before the start of 52[SUP]nd[/SUP] DAC, IP business is expected to remain stagnant for next… Read More


Together At Last—Combining Netlist and Layout Data for Power-Aware Verification

Together At Last—Combining Netlist and Layout Data for Power-Aware Verification
by Beth Martin on 09-25-2015 at 12:00 pm

The market demanded that gadgets it loves become ever more conscious of their power consumption, and chip designers responded with an array of clever techniques to cut IC power use. Unsurprisingly, these new techniques added to the complexity of IC verification. When you’re verifying a design that has 100+ separate power domains,… Read More


Electromigration Analysis and FinFET Self-Heating

Electromigration Analysis and FinFET Self-Heating
by Tom Dillinger on 09-24-2015 at 12:00 pm

FinFET processes provide power, performance, and area benefits over planar technologies. Yet, a vexing problem aggravated by FinFET’s is the greater local device current density, which translates to an increased concern for signal and power rail metal electromigration reliability failures. There is a critical secondary… Read More


Why Sidense OTP is Like the Armored Car of NVM

Why Sidense OTP is Like the Armored Car of NVM
by Tom Simon on 09-23-2015 at 4:00 pm

I have written about Sidense before, but last week at the TSMC Open Innovation Platform Forum, I had a chance to hear a talk by, and have lunch with Betina Hold Director of R&D at Sidense. Here is what I learned.

Sidense has been focusing on the growing market in what they like to call the smart connected universe. It is best to think… Read More


Enterprise Design Management Comes of Age

Enterprise Design Management Comes of Age
by Tom Simon on 09-22-2015 at 12:00 pm

The motivations for having a data and process management system in place for semiconductor design have existed for a long time. I am reluctant to admit it, but I remember early efforts to do this back in the 80’s at Valid Logic. Cadence was also developing this capability in house through the early 90’s. Back then designs were much … Read More


The Cost Challenge has Been Met – Let the Disruption Begin!

The Cost Challenge has Been Met – Let the Disruption Begin!
by Alex Lidow on 09-22-2015 at 12:00 am

Displacing the Silicon Power MOSFET with eGaN® FETs
35 years ago the silicon power MOSFET was a disruptive technology that displaced the bipolar transistor – and a $12B market emerged. The dynamics of this transition taught us that there are four key factors controlling the adoption rate of a new power conversion technology:

  • Does
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