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Technology Behind the Chip

Technology Behind the Chip
by Daniel Nenni on 10-15-2018 at 7:00 am

Tom Dillinger and I attended the Silvaco SURGE 2018 event in Silicon Valley last week with several hundred of our semiconductor brethren. Tom has a couple blogs ready to go but first let’s talk about the keynote by Silvaco CEO David Dutton. David isn’t your average EDA CEO, he spent the first 8 years of his career at Intel then spent … Read More


Detail-Route-Centric Physical Implementation for 7nm

Detail-Route-Centric Physical Implementation for 7nm
by Alex Tan on 10-10-2018 at 12:00 pm

For many years TSMC has provided IC design implementation guidance as viewed from the process and manufacturing standpoints. The last time TSMC Reference Flow incremented, it was version 12.0 back in 2011. Since then, increased design, process and packaging related complexities of the advanced nodes have demanded more focused… Read More


Crossfire Baseline Checks for Clean IP Part II

Crossfire Baseline Checks for Clean IP Part II
by Daniel Nenni on 10-10-2018 at 7:00 am

In our previous article bearing the same title, we discussed the recommended baseline checks covering cell and pin presence, back-end, and some front-end checks related to functional equivalency. In this article, we’ll cover the extensive list of characterization checks, that include timing arcs, NLDM, CCS, ECSM/EM, and … Read More


Closing Coverage in HLS

Closing Coverage in HLS
by Alex Tan on 10-08-2018 at 12:00 pm

Coverage is a common metric with many manifestation. During the ‘90s, both fault and test coverage were mainstream DFT (Design For Testability) terminologies used to indicate the percentage of a design being observable or tested. Its pervasive use was then spilled over into other design segments such as code coverage, formal… Read More


TSMC and Synopsys are in the Cloud!

TSMC and Synopsys are in the Cloud!
by Daniel Nenni on 10-08-2018 at 7:00 am

EDA has been flirting with the cloud unsuccessfully for many years now and it really comes down to a familiar question: Who can afford to spend billions of dollars on data center security? Which is similar to the question that started the fabless transformation: Who can afford to spend billions of dollars on semiconductor manufacturing… Read More


Synopsys Seeds Significant SIM Segue

Synopsys Seeds Significant SIM Segue
by Tom Simon on 10-02-2018 at 12:00 pm

It turns out that consumers are not alone in their love-hate relationship with SIM cards. SIM cards save us from increasingly widespread cellphone cloning. However, if your experience is anything like mine, it seemed that with every new phone, a new SIM card format was needed. Furthermore, people travelling overseas who wanted… Read More


Make Versus Buy for Semiconductor IP used in PVT Monitoring

Make Versus Buy for Semiconductor IP used in PVT Monitoring
by Daniel Payne on 10-01-2018 at 12:00 pm

As an IC designer I absolutely loved embarking on a new design project, starting with a fresh, blank slate, not having to use any legacy blocks. In the early 1980’s we really hadn’t given much thought to re-using semiconductor IP because each new project typically came with a new process node, so there was no IP even ready… Read More


SURGE 2018 Silvaco Update!

SURGE 2018 Silvaco Update!
by Daniel Nenni on 10-01-2018 at 7:00 am

The semiconductor industry has been very good to me over the past 35 years. I have had a front row seat to some of the most innovative and disruptive things like the fabless transformation and of course the Electronic Design Automation phenomenon, not to mention the end products that we as an industry have enabled. It is truly amazing… Read More


Crossfire Baseline Checks for Clean IP at TSMC OIP

Crossfire Baseline Checks for Clean IP at TSMC OIP
by Daniel Nenni on 09-26-2018 at 12:00 pm

IP must be properly qualified before attempting to use them in any IC design flow. One cannot wait to catch issues further down the chip design cycle. Waiting for issues to appear during design verification poses extremely high risks, including schedule slippage. For example, connection errors in transistor bulk terminals where… Read More


LightSuite – Physical Design Goes Photonics!

LightSuite – Physical Design Goes Photonics!
by Alex Tan on 09-26-2018 at 7:00 am

Light is a form of energy. It reveals an object’s color and shape through the refraction (passing through light) or the reflection (bouncing back light) of its beam. While photon is the smallest measure of light, the term photonicscan be defined as the science and technology of generating, controlling, and detecting photons. … Read More