CAST Compression IP Webinar 800x100 (2)
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The True Power of the TSMC Ecosystem!

The True Power of the TSMC Ecosystem!
by Daniel Nenni on 10-02-2023 at 6:00 am

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The 15th TSMC Open Innovation Platform® (OIP) was held last week. In preparation we did a podcast with one of the original members of the TSMC OIP team Dan Kochpatcharin. Dan and I talked about the early days before OIP when we did reference flows together. Around 20 years ago I did a career pivot and focused on Strategic Foundry Relationships.… Read More


Keysight EDA 2024 Delivers Shift Left for Chiplet and PDK Workflows

Keysight EDA 2024 Delivers Shift Left for Chiplet and PDK Workflows
by Don Dingee on 09-28-2023 at 8:00 am

Chiplet PHY Designer

Much of the recent Keysight EDA 2024 announcement focuses on high-speed digital (HSD) and RF EDA features for Advanced Design System (ADS) and SystemVue users, including RF System Explorer, DPD Explorer (for digital pre-distortion), and design elements for 5G NTN, DVB-S2X, and satcom phased array applications. Two important… Read More


Intel Ushers a New Era of Advanced Packaging with Glass Substrates

Intel Ushers a New Era of Advanced Packaging with Glass Substrates
by Mike Gianfagna on 09-18-2023 at 10:00 am

Intel Ushers a New Era of Advanced Packaging with Glass Substrates


Intel recently issued a press announcement that has significant implications for the future of semiconductors.  The release announces Intel’s new glass substrate technology. The headline states: Glass substrates help overcome limitations of organic materials by enabling an order of magnitude improvement in design rulesRead More


Chiplets and IP and the Trust Problem

Chiplets and IP and the Trust Problem
by Bernard Murphy on 09-12-2023 at 6:00 am

Trust min

Perforce recently hosted a webinar on “IP Lifecycle Management for Chiplet-Based SoCs”, presented by Simon Butler, the GM for the Methodics IPLM BU. The central theme was trust, for IPs as much as chiplets. How can an IP/chiplet consumer trust that what they receive has not been compromised somewhere in the value chain from initial… Read More


Interface IP in 2022: 22% YoY growth still data-centric driven

Interface IP in 2022: 22% YoY growth still data-centric driven
by Eric Esteve on 09-04-2023 at 10:00 am

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We have shown in the “Design IP Report” 2022 that the market share of the wired Interface IP category is a growing part of the total IP, and that this trend is confirmed year after year. The interface IP category has moved from 18% share in 2017 to 25% in 2022.

During the 2010-decade, smartphone was the strong driver for the IP industry,… Read More


CEO Interview: Anna Fontanelli of MZ Technologies

CEO Interview: Anna Fontanelli of MZ Technologies
by Daniel Nenni on 08-18-2023 at 6:00 am

ANNA (1)

Anna has more than 25 years of expertise in managing complex R&D organizations and programs, giving birth to a number of innovative EDA technologies. She has pioneered the study and development of several generations of IC and package co-design environments and has held senior positions at leading semiconductor and EDA … Read More


WEBINAR: The Power of Formal Verification: From flops to billion-gate designs

WEBINAR: The Power of Formal Verification: From flops to billion-gate designs
by Daniel Nenni on 08-15-2023 at 5:00 pm

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Semiconductor industry is going through an unprecedented technological revolution with AI/ML, GPU, RISC-V, chiplets, automotive and 5G driving the hardware design innovation. The race to deliver high performance, optimizing power and area (PPA), while ensuring safety and security is truly on. It has never been a more excitingRead More


Keynote Sneak Peek: Ansys CEO Ajei Gopal at Samsung SAFE Forum 2023

Keynote Sneak Peek: Ansys CEO Ajei Gopal at Samsung SAFE Forum 2023
by Daniel Nenni on 06-19-2023 at 10:00 am

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As one of the world’s leading chip foundries, Samsung occupies a vital position in the semiconductor value chain. The annual Samsung Advanced Foundry Ecosystem (SAFE™) Forum is a must-go event for semiconductor and electronic design automation (EDA) professionals. Ajei Gopal, President and CEO of Ansys, has the honor of delivering… Read More


Requirements for Multi-Die System Success

Requirements for Multi-Die System Success
by Daniel Nenni on 06-16-2023 at 6:00 am

Synopsys Chiplet Report 2023

Chiplets continue to be a hot topic on SemiWiki, conferences, white papers, webinars and one of the most active chiplet enabling vendors we work with is Synopsys. Synopsys is the #1 EDA and #1 IP company so that makes complete sense.

As you may have read, I moderated a panel on Chiplets at the last SNUG which we continue to write about.

Read More

TSMC Doubles Down on Semiconductor Packaging!

TSMC Doubles Down on Semiconductor Packaging!
by Daniel Nenni on 06-14-2023 at 6:00 am

TSMC 3DFabric Integration

Last week TSMC announced the opening of an advanced backend fab for the expansion of the TSMC 3DFabric System Integration Technology. It’s a significant announcement as the chip packaging arms race with Intel and Samsung is heating up.

Fab 6 is TSMC’s first all-in-one advanced packaging and testing fab which is part of the… Read More