WP_Term Object
(
    [term_id] => 15
    [name] => Cadence
    [slug] => cadence
    [term_group] => 0
    [term_taxonomy_id] => 15
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 633
    [filter] => raw
    [cat_ID] => 15
    [category_count] => 633
    [category_description] => 
    [cat_name] => Cadence
    [category_nicename] => cadence
    [category_parent] => 157
    [is_post] => 
)

Cadence DSPs float for efficiency in complex apps

Cadence DSPs float for efficiency in complex apps
by Don Dingee on 09-29-2016 at 4:00 pm

Floating-point computation has been a staple of mainframe, minicomputer, supercomputer, workstation, and PC platforms for decades. Almost all modern microprocessor IP supports the IEEE 754 floating-point standard. Embedded design, for reasons of power and area and thereby cost, often eschews floating-point hardware… Read More


Solutions for Variation Analysis at 16nm and Beyond

Solutions for Variation Analysis at 16nm and Beyond
by Tom Simon on 09-22-2016 at 7:00 am

Variation is still the tough nut to crack for advanced process nodes. The familiar refrain of lower operating voltages and higher performance requirements make process variation an extremely important design consideration. As far back as the early 2000’s design teams have been looking for a better approach to model variation… Read More


Next Book Signing: Linley Processor Conference 2016!

Next Book Signing: Linley Processor Conference 2016!
by Daniel Nenni on 09-20-2016 at 12:00 pm

It is a busy month for book signings but it is a pleasure to do it for the greater good of the semiconductor industry. It really is an honor to meet the people who keep our electronic devices on the leading edge of technology, absolutely.

The Linley Processor Conference is on September 27[SUP]th[/SUP]and 28[SUP]th[/SUP] at the Hyatt… Read More


Emulation as a Multi-User Shareable Resource

Emulation as a Multi-User Shareable Resource
by Bernard Murphy on 09-19-2016 at 7:00 am

One of the great advantages of emulation is that runtimes are much faster than for simulation – sufficiently fast that you can really debug hardware together with software for comprehensive use-case testing. A not so great aspect is that emulators are expensive and, until relatively recently, not particularly easy to share across… Read More


The Package Assembly Design Kit (PADK)… the start of something big

The Package Assembly Design Kit (PADK)… the start of something big
by Tom Dillinger on 08-19-2016 at 12:00 pm

Integrated wafer-level fanout (WLFO) packaging technology is emerging as a foundation for multi-die solutions. Mobile product applications require focus on both aggressive chip-to-chip interface performance, as well as the final package volume. Traditional multi-chip packages using PCB laminate substrates do not readily… Read More


Custom layout productivity requires unrelenting EDA vendor focus

Custom layout productivity requires unrelenting EDA vendor focus
by Tom Dillinger on 08-05-2016 at 12:00 pm

The EDA tools industry relies upon ongoing productivity enhancements to existing products, to manage increasing SoC complexity and to address shrinking design schedules. The source of ideas for enhancements can come from a variety of sources – e.g., customer feedback, collaboration with the foundries, and features found … Read More


The Appeal of a Multi-Purpose DSP

The Appeal of a Multi-Purpose DSP
by Bernard Murphy on 07-26-2016 at 9:45 am

When you think of a DSP IP, you tend to think of very targeted applications – for baseband signal processing or audio or vision perhaps. Whatever the application, sometimes you want a solution optimally tuned to that need: best possible performance and power in the smallest possible footprint. These needs will continue,… Read More


Formally Crossing the Chasm

Formally Crossing the Chasm
by Bernard Murphy on 07-25-2016 at 7:00 am

Formal verification for hardware was stuck for a long time with a reputation of being interesting but difficult to use and consequently limited to niche applications. Jasper worked hard to change this, particularly with their apps for JasperGold and I have been seeing more anecdotal information that mainstream adoption is growing.… Read More


From Zero to IoT Prototype in One Month

From Zero to IoT Prototype in One Month
by Bernard Murphy on 06-30-2016 at 7:00 am

The best things in life may not always be free, but they don’t have to be incredibly difficult to get to. A challenge for IoT designers has been that their bubbling excitement over the potential of their new gizmo is quickly tempered by the complexities of actually building the hardware. Not exactly what they have come to expect in … Read More


10 signs on the neural-net-based ADAS road

10 signs on the neural-net-based ADAS road
by Don Dingee on 06-24-2016 at 12:00 pm

Every day I read stuff about the coming of fully autonomous vehicles, and it’s not every day we get a technologist’s view of the hurdles faced in getting there. Chris Rowen, CTO of Cadence’s IP group, gave one of the best presentations I’ve seen on ADAS technology and convolutional neural networks (CNNs) at #53DAC, pointing… Read More