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Custom layout productivity requires unrelenting EDA vendor focus

Custom layout productivity requires unrelenting EDA vendor focus
by Tom Dillinger on 08-05-2016 at 12:00 pm

The EDA tools industry relies upon ongoing productivity enhancements to existing products, to manage increasing SoC complexity and to address shrinking design schedules. The source of ideas for enhancements can come from a variety of sources – e.g., customer feedback, collaboration with the foundries, and features found … Read More


The Appeal of a Multi-Purpose DSP

The Appeal of a Multi-Purpose DSP
by Bernard Murphy on 07-26-2016 at 9:45 am

When you think of a DSP IP, you tend to think of very targeted applications – for baseband signal processing or audio or vision perhaps. Whatever the application, sometimes you want a solution optimally tuned to that need: best possible performance and power in the smallest possible footprint. These needs will continue,… Read More


Formally Crossing the Chasm

Formally Crossing the Chasm
by Bernard Murphy on 07-25-2016 at 7:00 am

Formal verification for hardware was stuck for a long time with a reputation of being interesting but difficult to use and consequently limited to niche applications. Jasper worked hard to change this, particularly with their apps for JasperGold and I have been seeing more anecdotal information that mainstream adoption is growing.… Read More


From Zero to IoT Prototype in One Month

From Zero to IoT Prototype in One Month
by Bernard Murphy on 06-30-2016 at 7:00 am

The best things in life may not always be free, but they don’t have to be incredibly difficult to get to. A challenge for IoT designers has been that their bubbling excitement over the potential of their new gizmo is quickly tempered by the complexities of actually building the hardware. Not exactly what they have come to expect in … Read More


10 signs on the neural-net-based ADAS road

10 signs on the neural-net-based ADAS road
by Don Dingee on 06-24-2016 at 12:00 pm

Every day I read stuff about the coming of fully autonomous vehicles, and it’s not every day we get a technologist’s view of the hurdles faced in getting there. Chris Rowen, CTO of Cadence’s IP group, gave one of the best presentations I’ve seen on ADAS technology and convolutional neural networks (CNNs) at #53DAC, pointing… Read More


IC Designers talk about 28nm to 7nm challenges at #53DAC

IC Designers talk about 28nm to 7nm challenges at #53DAC
by Daniel Payne on 06-20-2016 at 12:00 pm

IC design challenges are different at advanced nodes like 7nm, so to learn more about the topic I attended a panel luncheon at DAC sponsored by Cadence. The moderator was both funny and technically astute, quite the rare combination, so kudos to Professor Rob Rutenbar, a former Neolinear guy now at the University of Illinois. Panelists… Read More


Climbing the Infinite Verification Mountain

Climbing the Infinite Verification Mountain
by Bernard Murphy on 06-14-2016 at 7:00 am

Many years ago I read a great little book by Rudy Rucker called “Infinity and the Mind”. This book attempts to explain the many classes of mathematical infinity (cardinals) to non-specialists. As he gets to the more abstract levels of infinity, the author has to resort to an analogy to give a feel for extendible and other cardinal … Read More


Six Reasons to Visit Cadence at #53DAC this Year in Austin

Six Reasons to Visit Cadence at #53DAC this Year in Austin
by Daniel Payne on 05-29-2016 at 4:00 pm

For bloggers like myself spending four days at #53DAC is almost a non-stop blur of activity, visiting EDA vendors, IP providers and foundries to learn about what’s happening in our semiconductor industry. Cadence is both an EDA vendor and IP provider, so DAC is a great showcase for them to tell us what’s new in 2016 and… Read More


Getting Low Power Design Right in Mixed Signal Designs

Getting Low Power Design Right in Mixed Signal Designs
by Bernard Murphy on 05-12-2016 at 4:00 pm

Mixed-signal design creates all sorts of interesting problems for implementation and verification flows, particularly when it comes to design for low power. We tend to think of mixed-signal as a few blocks like PLLs, ADCs and PHYs on the periphery of the design. Constrain and verify the digital power requirements up to analog … Read More


Eight Improvements for PCB Software

Eight Improvements for PCB Software
by Daniel Payne on 05-04-2016 at 12:00 pm

I first met John Durbetaki at Intel in Aloha, Oregon and we both had a keen interest in the nascent personal computer industry. My first PC was made by Radio Shack and dubbed the TRS-80 which maxed out at 48KB of RAM. I kept watch on Durbetaki as he left Intel and formed his own company OrCAD in 1985 to serve the needs of PC-based CAD software.… Read More