There are many unsung heroes in our industry – companies that provide unique services and expertise that enable the rapid advances in fabrication process development that we’ve come to rely upon. Some of these companies offer “back-end” services, assisting semiconductor fabs with yield diagnostic engineering and failure… Read More
Author: Tom Dillinger
Webinar: Rapid Exploration of Advanced Materials (for Ferroelectric Memory)
Resistive RAM (ReRAM) Computing-in-Memory IP Macro for Machine Learning
The term von Neumann bottleneck is used to denote the issue with the efficiency of the architecture that separates computational resources from data memory. The transfer of data from memory to the CPU contributes substantially to the latency, and dissipates a significant percentage of the overall energy associated with … Read More
Electromagnetic and Circuit RLCK Extraction and Simulation for Advanced Silicon, Interposers and Package Designs
For years, there have been rather distinct domains for the extraction of interconnect models from physical design data.
Chip designers commonly focused on RC parasitics for circuit/path delay calculations and dynamic I*R voltage drop analysis. The annotation of extracted parasitics to a netlist model required the layout… Read More
All-Digital In-Memory Computing
Research pursuing in-memory computing architectures is extremely active. At the recent International Solid State Circuits conference (ISSCC 2021), multiple technical sessions were dedicated to novel memory array technologies to support the computational demand of machine learning algorithms.
The inefficiencies associated… Read More
Register File Design at the 5nm Node
“What are the tradeoffs when designing a register file?” Engineering graduates pursuing a career in microelectronics might expect to be asked this question during a job interview. (I was.)
On the surface, one might reply, “Well, a register file is just like any other memory array – address inputs, data inputs and outputs, read/write… Read More
A Review of Clock Generation and Distribution for Off-Chip Interfacing
At the recent ISSCC conference, Mozhgan Mansuri from Intel gave an enlightening (extended) short course presentation on all thing related to clocking, for both wireline and wireless interface design. [1] The presentation was extremely thorough, ranging from a review of basic clocking principles to unique circuit design … Read More
Features of Short-Reach Interface IP Design
The emergence of advanced packaging technologies has led to the introduction of new types of data communication interfaces. There are a number of topologies that are defined by the IEEE 802.3 standard, as well as the Optical Internetworking Common Electrical I/O CEI standard. [1,2] (Many of the configurations of interest … Read More
Features of Resistive RAM Compute-in-Memory Macros
Resistive RAM (ReRAM) technology has emerged as an attractive alternative to embedded flash memory storage at advanced nodes. Indeed, multiple foundries are offering ReRAM IP arrays at 40nm nodes, and below.
ReRAM has very attractive characteristics, with one significant limitation:
- nonvolatile
- long retention time
- extremely
System-level Electromagnetic Coupling Analysis is now possible, and necessary
With the increasing density of electronics in product enclosures, combined with a broad range of operating frequencies, designers must be cognizant of the issues associated with the radiation and coupling of electromagnetic energy. The interference between different elements of the design may result in coupling noise-induced… Read More
The Latest in Dielectrics for Advanced Process Nodes
Of the three types of materials used in microelectronics – i.e., semiconductors, metals, and dielectrics – the first two often get the most attention. Yet, there is a pressing need for a rich variety of dielectric materials in device fabrication and interconnect isolation to satisfy the performance, power, and reliability … Read More
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How Mentor became Siemens EDA