When people discuss capabilities of leading edge process nodes they tend to focus on digital logic. Microprocessors in particular. But a process requires more than just digital logic and standard cells to be successful. In particular, pretty much every SoC contains a lot of memory so the memory capabilities of a process are important.… Read More
Author: Paul McLellan
A Brief History of Andes Technology
I like to call Andes Technology the biggest microprocessor IP company you’ve never heard of. I wrote about themback in October when I sat down with them during the Linley Microprocessor Conference. Part of the reason you have never heard of them is that they are based in Taiwan and most of their business is in Taiwan and China.… Read More
GlobalFoundries Has a New CEO
Sanjay Jha is taking over as CEO of GlobalFoundries. His background is in mobile. He was at Qualcomm in the early part of his career and was COO from 2006 to 2008 before going to be co-CEO of Motorola and then, when the company was split, CEO of Motorola Mobility. That was acquired by Google and he stepped down after the acquisition closed.… Read More
Imagination’s New GPU Cores
This morning Imagination announced their latest GPU cores, including the world’s smallest fully-featured OpenGL ES3.0/OpenCL GPU core. More on that below. And it is the Internet…and graphics…so cats. Graphically rendered cats.
The first core is a a high end core new generation PowerVR Series6XT architecture… Read More
Structured Asic Dies…Again
There has always been a dream that you could do a design in a cheap easy to design technology and then, if the design was a hit, press a button and instantly move it into a cheaper unit-price high volume design. When I was at VLSI in the 1980s we had approaches to make it easy to move gate arrays (relatively large die area) into standard cells… Read More
New Frontiers in Scan Diagnosis
As we move down into more and more advanced process nodes, the rules of how we test designs are having to change. One big challenge is the requirement to zoom in and fix problems by doing root cause analysis on test data alone, along with the rest of the design data such as detailed layout, optical proximity correction and so on. But without… Read More
NoC, NoC: Your Chip May Be Under Attack
SoCs face a lot of issues related to security and the Network-on-Chip (NoC) is in a good position to facilitate system-wide services. SoCs are now so complex that one of the challenges is to make sure that the chip does what it is meant to do and doesn’t do what it isn’t meant to do. Just as in software, security used to be … Read More
ClioSoft at Arasan
Arasan recently adopted ClioSoft for data management (DM) for design and development of Arasan’s Silicon IP products. This morning I talked to Erik Peterson, Senior CAD and Verification Engineer AMS Design about their experiences bringing up ClioSoft.
Data management infrastructure is critical with engineering projects… Read More
2013 Awards, and the Winner is…Power
Of all the things that designers have to worry about in the power-performance-area (PPA) equation, the most challenging is power. SoCs have reached a point that we can put a lot of stuff on them, but if we are not careful we cannot light it all up at once. Dark silicon, where we put subsystems on a chip but then don’t have enough … Read More
Macro Placement Challenges
One of the challenges of physical design of a modern SoC is that of macro placement. Back when a design just had a few macros then the flooplanning could be handled largely manually. But modern SoCs suffer from a number of problems. A new white paper from Mentor covers Olympus-SOCs features to address these issues:
- As we move to smaller
cHBM for AI: Capabilities, Challenges, and Opportunities