The flexibility of RISC-V processor IP allows much freedom to meet specific requirements – but it also opens the potential for many bugs created during the design process. Advanced processor features are especially prone to errors, increasing the difficulty and time needed for thorough verification. Born out of necessity, … Read More
Author: Don Dingee
Formal-based RISC-V processor verification gets deeper than simulation
Configurable RISC-V core sidesteps cache misses with 128 fetches
Modern CPU performance hinges on keeping a processor’s pipeline fed so it executes operations on every tick of the clock, typically using abundant multi-level caching. However, a crop of cache-busting applications is looming, like AI and high-performance computing (HPC) applications running on big data sets. Semidynamics… Read More
Advanced electro-thermal simulation sees deeper inside chips
Heat and semiconductor reliability exist in an inversely proportional relationship. Before the breaking point at the thermal junction temperature rating, every 10°C rise in steady-state temperature cuts predicted MOSFET life in half. Yet, heat densities rise as devices plunge into harsher environments like smartphones,… Read More
eFPGA goes back to basics for low-power programmable logic
When you think “FPGA,” what comes to mind? Massive, expensive parts capable of holding a lot of logic but also consuming a lot of power. Reconfigurable platforms that can swallow RTL for an SoC design in pre-silicon testing. Big splashy corporate acquisitions where investors made tons of money. Exotic 3D packaging and advanced… Read More
MIPI D-PHY IP brings images on-chip for AI inference
Edge AI inference is getting more and more attention as demand grows for AI processing across an increasing number of diverse applications, including those requiring low-power chips in a wide range of consumer and enterprise-class devices. Much of the focus has been on optimizing the neural network processing engine for these… Read More
Deep thinking on compute-in-memory in AI inference
Neural network models are advancing rapidly and becoming more complex. Application developers using these new models need faster AI inference but typically can’t afford more power, space, or cooling. Researchers have put forth various strategies in efforts to wring out more performance from AI inference architectures,… Read More
WEBINAR: Secure messaging in a post-quantum world
In a recent marketing campaign, WhatsApp (and by extension, its parent company Meta) mocks the ubiquitous but unsecure messaging vehicle, SMS, saying anyone can read plain texts and mobile users should use some means of secure messaging. Apps like WhatsApp, Messenger, iMessage, and WeChat have each attracted over 1 billion … Read More
Area-optimized AI inference for cost-sensitive applications
Often, AI inference brings to mind more complex applications hungry for more processing power. At the other end of the spectrum, applications like home appliances and doorbell cameras can offer limited AI-enabled features but must be narrowly scoped to keep costs to a minimum. New area-optimized AI inference technology from… Read More
Big plans for state-of-the-art RF and microwave EDA
RF and microwave design is no longer confined to a few defense and aerospace EEs huddled in dark cubicles working with spreadsheets and primitive circuit simulators. Now, areas like 5G and automotive demand complex RF systems. Advanced RF and microwave EDA tools are taking on electromagnetic (EM), thermal, and power simulation,… Read More
MIPI bridging DSI-2 and CSI-2 Interfaces with an FPGA
We’re so spoiled by 4K and 8K and frame rates of 120 Hz or higher video content on high-performance devices that now, many of us expect these higher resolutions and rates on even small devices. The necessary interfaces exist in MIPI Display Serial Interface 2 (DSI-2) and Camera Serial Interface 2 (CSI-2). The challenge is these interfaces… Read More
Intel Foundry is a Low Risk Aternative to TSMC