Kids have a tendency to put things in their mouths. Any parent can relate to the statement, “Put that down! You don’t know where it’s been!” After the first child, concern usually relaxes quite a bit. People joke about a 5-second rule on the premise if an object was just dropped on the floor, it may not be contaminated yet.… Read More
Author: Don Dingee
Intel reaches for all-new experience at CES2016
When Gary Shapiro introduced Brian Krzanich for Intel’s keynote at #CES2016, he just possibly may have been the last person to say “Moore’s Law” outside of a museum ever again. Krzanich was about to take Intel into new territory, where “Copy Exactly” and tick-tock also don’t matter.… Read More
mbed OS abstraction battles IoT hyperfragmentation
In the days of bit banging and single-threaded loops, programming a microcontroller meant grabbing a C compiler (or even before that, an assembler) and some libraries and writing bare metal code. High performance networking and multi-tasking was usually the purview of heavier real-time operating systems (RTOS) or, if an MMU… Read More
Networking through Dark Silicon Power Islands
For decades, tracing back to the days of Deming, the way to tackle complex engineering problems has been the pareto chart. Charting conditions and their contribution to the problem leads to mitigation priorities.
In the case of SoC power management, the old school pareto chart said the processor core was the biggest power hog and… Read More
DSP gives Project Tango a power dip
Google’s Project Tango is a prime example of a sophisticated application pushing the boundaries of what is possible within the power envelope of a mobile device. Its objective is to combine 3D motion tracking with depth sensing to understand how a device is moving and gauge its surroundings precisely.… Read More
Mass customization coming to MEMS?
With the industry abuzz about the Apple purchase of a Maxim Integrated fab as a potential R&D facility for MEMS design, it begs the question: is creating a MEMS device that easy?
MEMS technology is approaching the same fork in the road where digital design encountered LSI four decades earlier. … Read More
3 flavors of TMR for FPGA protection
Back in the microprocessor stone age, government procurement agencies fell in love with the idea of radiation hardened parts that might survive catastrophic events. In those days, before rad-hard versions of PowerPC and SPARC arrived, there were few choices for processors in defense and space programs.
One of the first rad-hard… Read More
5 ways FPGA-based prototyping shrinks design time
Engineers are trained to think linearly, along the lines of we started here, then we did this, and that, and this other stuff, and here is where we ended up. If you’ve ever presented in an internal review meeting, sales conference, or a TED-like event, you know that is a dangerous strategy in winning friends and influencing people.… Read More
Mentor takes IoT devices to cloud and back
Walking into the Mentor Graphics booth at ARM TechCon, I was greeted by my friends Warren Kurisu and Shay Benchorin. It was good to see them both again. They were poised in front of a table with a Samsung tablet and a small Wi-Fi-ish box, next to a large Samsung printer. The demonstration was similar to a lobby check-in process, where… Read More
Finding under- and over-designed NoC links
When it comes to predicting SoC performance in the early stages of development, most designers rely on simulation. For network-on-chip (NoC) design, two important factors suggest that simulation by itself may no longer be sufficient in delivering an optimized design.
The first factor is use cases. I think I’ve told the story … Read More
Silicon Insurance: Why eFPGA is Cheaper Than a Respin — and Why It Matters in the Intel 18A Era