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At DAC in Austin a design company, foundry and EDA vendor teamed up to present their experiences with 14nm FinFETs during a breakfast on Tuesday.
Panelists included:
Last Monday at DAC I met with Linda Fosler, Marketing Director at Mentor Graphics to get an update on what’s new with Eldo(Circuit simulator) and Pyxis (custom IC layout and schematic).
Linda Fosler, Mentor Graphics… Read More
Mentor Graphics throws a very nice dinner party at DAC each year for journalists, bloggers and top customers, so this year I spoke with Michael Buehler-Garcia about what’s new with Calibre.
Michael Buehler-Garcia, Mentor Graphics
… Read More
Lawsuits in EDA are common, and Tela Innovationsfiled a huge complaint back in February with the U.S. International Trade Commission (USITC) against HTC Corporation; HTC America, Inc.; LG Electronics, Inc.; LG Electronics U.S.A., Inc.; LG Electronics MobileComm U.S.A., Inc.; Motorola Mobility LLC; Nokia Corporation; Nokia,… Read More
Jeff Tuanis the CEO and President of an EDA startup called G-Analog, founded in May 2012. His background includes working at: Cadence, Epic, Synopsys, Nassda, Chartered Semi and GLOBALFOUNDRIES. Jason Lu is the R&D manager. We met at DAC last week to talk about his company’s new product called Gchar for IC library characterization… Read More
Custom IC design and layout is becoming more difficult at 20nm and smaller nodes, so the EDA tools have to get smarter and work harder for us in order to maintain productivity with the fewest iterations to reach our specs. Dave Stylesand John Stabenow of Cadence met with me last Monday in Austin at the DAC exhibit area.
John Stabenow… Read More
John Heinleinfrom ARM briefed me at DAC exactly one week ago. I love to use my mobile devices (MacBook Pro, iPad and Samsung Galaxy Note II) every day, and many mobile devices are ARM-powered because of the low power consumption, and pervasive eco-system around the architecture. Apple with the MacBook Pro is still Intel-powered,… Read More
Last year at DAC we didn’t really know the circuit simulation roadmap for Synopsys because of all the EDA company acquisitions, however this year it’s clear to me that:
In a typical analog IC design team, multiple engineers and layout professionals work on cells and libraries. At various points during the design process they will commit changes to their designs into the Design Management (DM) system that manages their files – be it Subversion, Perforce or some other commercial tool.
Using the… Read More
Monday morning at DAC I met with Real Intent to get an update on their SoC sign-off tools:
Years ago Prakash was at IBM the only two years that they attended DAC, in an attempt to offer their internal EDA tools to the EDA marketplace. Graham worked at Nassda marketing the… Read More
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The Risk of Not Optimizing Clock Power