Always-sensing cameras are a relatively new method for users to interact with their smartphones, home appliances, and other consumer devices. Like always-listening audio-based Siri and Alexa, always-sensing cameras enable a seamless, more natural user experience. However, always-sensing camera subsystems require specialized… Read More
Author: Daniel Nenni
CEO Interview: Issam Nofal of IROC Technologies
Issam Nofal is the CEO of IROC Technologies and has held various positions with the company for over 23 years as Product Manager, Project Leader, and R&D Engineer. He has authored several papers on test and reliability of Integrated Circuits. He holds a PhD in Microelectronics from Grenoble INP.
What is IROC Technologies’
… Read MoreWhy Generative AI for Chip Design is a Game Changer
AI-generated chip design is progressing at an incredible pace!
Earlier this week, I wrote about the Efabless AI Generated Open–Source Silicon Design Challenge. If you haven’t done so already, take a closer look at the challenge and see first-hand what this is all about. In talking to Mike Wishart and Mohamed Kassem, co-founders… Read More
US giant swoops for British chipmaker months after Chinese sale blocked on national security grounds
According to UK based The Telegraph Pulsic is a chip maker and Cadence is a swooping US giant. I guess you have to stretch the truth to get those precious clicks these days. Even so this is a strategic acquisition for Cadence.
Pulsic is a 20+ year old EDA software company that offers chip planning and implementation software for custom… Read More
Chiplet Q&A with John Lee of Ansys
At the recent Synopsys Users Group Meeting (SNUG) I had the honor of leading a panel of experts on the topic of chiplets. One of those panelists was John Lee, Head of Electronics, Semiconductors and Optics at Ansys.
How is the signoff flow evolving and what is being done to help mitigate the growing signoff complexity challenge?
With… Read More
eFPGA Enabled Chiplets!
With our continuing chiplet coverage I found this of great interest. I have always felt that eFPGAs and chiplets are a natural fit for the next generation of chip design and this is an excellent example. As we design with chiplets one of the challenges is verification/validation in regards to performance and interoperability. … Read More
Ansys Acquires Another!
The headline is: Ansys Signs Definitive Agreement to Acquire Diakopto, Expands Multiphysics Simulation Portfolio for Semiconductor Designers. The acquisition complements Ansys’ existing signoff solutions and enables integrated circuit (IC) designers to detect problems earlier in the design flow.
Which is certainly… Read More
Join the AI Generated Open-Source Silicon Design Challenge!
As we all know design starts are the life blood of the semiconductor industry, both big and small. Enabling those design starts is what the semiconductor ecosystem is all about and Efabless has a very unique value proposition in this regard.
Efabless is a free cloud-based chip design platform, growing community of 9000+ chip designers,… Read More
Silicon Catalyst and Arm announce $150,000 Silicon Startup Contest!
As I sift through mounds of semiconductor press releases trying to figure out the relevance (with mixed results) I consider it a learning experience even when they don’t really tell me anything. This one however tells me two very important things:
1) Arm is a much more competitive company with the new leadership. I saw a noticeable… Read More
Chiplet Q&A with Henry Sheng of Synopsys
At the recent Synopsys Users Group Meeting (SNUG) I had the honor of leading a panel of experts on the topic of chiplets. One of those panelists was the very personable Dr. Henry Sheng, Group Director of R&D in the EDA Group at Synopsys. Henry currently leads engineering for 3DIC, advanced technology and visualization.










RISC-V and AI: The Architecture Shift Is Now