Synopsys recently presented a webinar on using their own software to optimize one of their own IPs (an ARC HS68 processor) for both performance and power through what looks like a straightforward flow from initial configuration through first level optimization to more comprehensive AI-driven PPA optimization. Also of note … Read More
Author: Bernard Murphy
A Fast Path to Better ARC PPA through Fusion Quickstart Implementation Kits and DSO.AI
Arm Total Design Hints at Accelerating Multi-Die Activity
I confess I am reading tea leaves in this blog, but why not? Arm recently announced Arm Total Design, an expansion of their Compute Subsystems (CSS) offering which made me wonder about the motivation behind this direction. They have a lot of blue-chip partners lined up for this program yet only a general pointer to multi-die systems… Read More
DVCon Europe is Coming Soon. Sign Up Now
I’m a fan of DVCon, a fan of Accellera and a fan of Munich, hosting DVCon Europe once again. This year’s event runs from November 14th through 15th (with some events on the 16th) at the Holiday Inn Munich in the City Center. Phillippe Notton (CEO, SiPearl) will deliver a keynote on “Energy Efficient High-Performance Computing in the… Read More
Developing Effective Mixed Signal Models. Innovation in Verification
Mixed-signal modeling is becoming more important as interaction between digital and analog circuitry become more closely intertwined. This level of modeling depends critically on sufficiently accurate yet fast behavioral models for analog components. Paul Cunningham (Senior VP/GM, Verification at Cadence), Raúl Camposano… Read More
A New Ultra-Stable Resistivity Monitor for Ultra-Pure Water
I am straying from my normal range of topics here, but confess I am developing an interest in semiconductor metrology since it takes me back to my physics and math roots. Even better I get to learn about the state of the art in ultra-pure water for semiconductor applications, an area where resistivity monitors play a role since resistivity… Read More
Powering eMobility Through Silicon-Carbide Substrates
While writing on infotainment and ADAS I sometimes wonder about the devices that make an EV run. These have nothing to do with digital or software wizardry. While logic and software play a role, the real heart of EV power is in power electronics driving motors, regenerative braking and charger options at home and on the road. Technologies… Read More
Qualcomm Insights into Unreachability Analysis
Unreachability (UNR) analysis, finding and definitively proving that certain states in a design cannot possibly be covered in testing, should be a wildly popular component in all verification plans. When the coverage needle stubbornly refuses to move, where should you focus testing creativity while avoiding provably untestable… Read More
Synopsys Panel Updates on the State of Multi-Die Systems
Synopsys recently hosted a cross-industry panel on the state of multi-die systems which I found interesting not least for its relevance to the rapid acceleration in AI-centric hardware. More on that below. Panelists, all with significant roles in multi-die systems, were Shekhar Kapoor (Senior Director of Product Management,… Read More
Can Generative AI Recharge Phone Markets?
Consensus on smartphone markets hovers somewhere between slight decline and slight growth indicating lack of obvious drivers for more robust growth. As a business opportunity this unappealing state is somewhat offset by sheer volume ($500B in 2023 according to one source) but we’re already close to peak adoption outside of … Read More
Assertion Synthesis Through LLM. Innovation in Verification
Assertion based verification is a very productive way to catch bugs, however assertions are hard enough to write that assertion-based coverage is not as extensive as it could be. Is there a way to simplify developing assertions to aid in increasing that coverage? Paul Cunningham (Senior VP/GM, Verification at Cadence), Raúl … Read More
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