Safety engineers, hardware designers and reliability specialists in safety-critical industries like automotive, aerospace, medical device and industrial automation use FMEDA (Failure Modes, Effects and Diagnostic Analysis). ISO 26262 compliance for ADAS, braking systems and ECUs require FMEDA in the automotive sector.… Read More
How Customized Foundation IP Is Redefining Power Efficiency and Semiconductor ROIAs computing expands from data centers to edge…Read More
Akeana Partners with Axiomise for Formal Verification of Its Super-Scalar RISC-V CoresAkeana Inc. announced a key milestone in the…Read More
An AI-Native Architecture That Eliminates GPU InefficienciesA recent analysis highlighted by MIT Technology Review…Read More
Caspia Technologies Unveils A Breakthrough in RTL Security Verification Paving the Way for Agentic Silicon SecurityIn a significant advancement for the semiconductor industry,…Read More
Designing the Future: AI-Driven Multi-Die Innovation in the Era of Agentic EngineeringAt the 2026 Chiplet Summit, Synopsys presented a…Read MoreRVA23 Ends Speculation’s Monopoly in RISC-V CPUs
RVA23 marks a turning point in how mainstream CPUs are expected to scale performance. By making the RISC-V Vector Extension (RVV) mandatory, it elevates structured, explicit parallelism to the same architectural status as scalar execution. Vectors are no longer optional accelerators bolted onto speculation-heavy cores.… Read More
Perforce and Siemens Collaborate on 3DIC Design at the Chiplet Summit
The recent Chiplet Summit at the Santa Clara Convention Center was buzzing with many enabling technologies for chiplet-based design. Collaboration was also on display during many parts of the show. A presentation in the Siemens booth was a perfect example of both of those trends. In the Siemens booth, Perforce presented an excellent… Read More
Building the Interconnect Foundation: Bump and TSV Planning for Multi-Die Systems
The first article in this series examined how feasibility exploration (hyperlink to SemiWiki first article) enables architects to evaluate multi-die system configurations while minimizing early design risk. Once architectural decisions are validated, designers must translate conceptual connectivity requirements … Read More
CHERI: Hardware-Enforced Capability Architecture for Systematic Memory Safety
The rapid escalation of cyberattacks over the past two decades has exposed a fundamental weakness at the core of modern computing systems: the lack of memory safety. Industry data consistently shows that the majority of critical software vulnerabilities stem from memory corruption issues such as buffer overflows, use-after-free… Read More
WEBINAR: Two-Part Series on RF Power Amplifier Design
At lower frequencies with simpler modulation, RF power amplifier (PA) designers could safely concentrate on a few primary metrics – like gain and bandwidth – and rely on relaxed margins to ensure proper operation in a range of conditions. Today’s advanced RF PA design is a different story. mmWave and sub-THz frequencies introduce… Read More
Securing RISC-V Third-Party IP: Enabling Comprehensive CWE-Based Assurance Across the Design Supply Chain
by Jagadish Nayak
RISC-V adoption continues to accelerate across commercial and government microelectronics programs. Whether open-source or commercially licensed, most RISC-V processor cores are integrated as third-party IP (3PIP), potentially introducing supply chain security challenges that demand structured,… Read More
Apple’s iPhone 17 Series 5G mmWave Antenna Module Revealed to be Powered by Soitec FD-SOI Substrates
Recent independent teardown and technical analyses have confirmed that the 5G mmWave antenna module powering Apple’s latest iPhone 17 lineup relies on advanced SOITEC based Fully Depleted Silicon-On-Insulator (FD-SOI) substrate technology. The discovery highlights a significant architectural shift in high-frequency… Read More
Another Quantum Topic: Quantum Communication
In my recent series on quantum computing (QC), I intentionally overlooked a couple of adjacent topics: quantum communication and quantum sensing. These face some of the same challenges as QC, however I noticed a recent report on a test quantum network implemented by Cisco and Qunnect which led me to find more from Cisco on their … Read More
Advancing Automotive Memory: Development of an 8nm 128Mb Embedded STT-MRAM with Sub-ppm Reliability
The rapid evolution of automotive technology has intensified the demand for highly reliable, high-performance semiconductor memory solutions. Modern vehicles increasingly rely ADAS driving features, and complex infotainment platforms, all of which require memory that can operate flawlessly under extreme environmental… Read More


Memory Matters: Signals from the 2025 NVM Survey