FD-SOI, an Opportunity for China?

Last month in Shanghai was a meeting of the FD-SOI consortium. The focus of the meeting was largely on the suitability of using FD-SOI to serve the Chinese market. The fabs in China are not right on the bleeding edge and are very cost-sensitive so 28nm is probably as advanced as they will get for a long time if not indefinitely. China has a goal that by 2020 they will manufacture 40% of the semiconductors used in China within the country. This is a big goal since China is actually the largest market for semiconductors in the world. This year the Chinese market will be $161B with just 8.9% being manufactured in Chinese fabs. Of course a lot of those semiconductors are re-exported inside finished goods but a lot are consumed in China too, after all it is also the largest market for smartphones.

The opening keynote was given by Handel Jones of IBS. He pointed out that FD-SOI is a great bridge process between 28nm planar and FinFET. It has a lot of the same power efficiency, low leakage etc but at a price that is roughly the same as planar. Handel still believes that 14nm/16nm will not ramp until Q4/2016 or Q1/2017, which seems very late based on everything else we have been hearing. Handel also had estimates of 28nm wafer volume going out to the middle of the next decade. 28nm is clearly going to be a very long-lasting node which also means that there is potentially a very large market for 28nm FD-SOI.

Handel also had some wafer pricing data. I assume that this is based on a model rather than actual quoted prices since those are usually too commercially sensitive. A 28nm FD-SOI wafer in 2015 is $2400, compared to a 14/16nm FinFET at $4800 and 14/16nm FD-SOI at $3600. If those predictions hold out then that is quite a price differential between FD-SOI and FinFET at the 14/16nm node. By 2017 IBS reckon that the cost of 100M gates will be just 90c in 28nm FD-SOI compared to $1.57 in 14/16nm FinFET, so nearly half as much again for the FinFET.

Other presentations were:

• Laurent Remont of ST on FD-SOI technology
• Marco Cassele-Rossi of Synopsys on designing with FD-SOI
• Haoron Wang of Synapse on designing with FD-SOI for power efficiency
• Pete Fowley of Wave Semiconductor on leveraging FD-SOI to achieve low power and high speed
• Giorgio Cesana of ST on FD-SOI for energy efficient ICs
• Tom Reeves of IBM (maybe soon GlobalFoundries) on the SOI ecosystem
• Paul Colestock of GlobalFoundries on foundry business opportunities

The presentations can all be downloaded here.