Berkeley DA coined the phrase “Analog FastSPICE”, and I’ve been getting an update from them at DAC for several years now. In Austin I met with Paul Estradathe COO and Patrick Muyshondt.
Paul Estrada
Paul Estrada, COO (circa 2010)
Continue reading “Analog FastSPICE at DAC”
I love it when EDA companies send their engineers to DAC because I learn more of the unvarnished truth about their products. I met with Bill Thomas of Aldec to get an update on their HW prototyping boards, then two NEC engineers to learn about High Level Synthesis.
HW Prototyping
Bill Thomas, Research Engineer at Aldec
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Last year I was surprised at DAC by an un-heard of EDA company from China, ICScape. This year I followed up and spoke with Ravi Ravikumar about what’s new with ICScape in 2013.
The building blocks for every SoC are standard cell libraries that are assembled, designed and verified together. But how do we really know if all the data formats used during design are correct and consistent? To answer that question I spoke with Johan Peetersof Fractal Technologiesat DAC.
Johan Peeters, Rene Donkers
Continue reading “Validating Hard IP & Std Cell Libraries at DAC”
The smaller the process node the more necessary it is that you extract accurate parasitics from interconnect and 3D structures in order to analyze timing, thermal effects and ESD compliance. Silicon Frontlinehas EDA tools in all three of these categories, so I met with Dermott Lynchat DAC to get an annual update.
Dermott Lynch, 3rd from left
Continue reading “A 3D Field Solver for Parasitic Extraction Thermal ESD Analysis”
I listened to Dan Niles’s quarterly report that he does for GSA. He had a lot of the usual background data on savings rates and GDP growth, but the big story is that everything changed on May 22nd and that this will turn out to be a very significant moment. That was the day that the Fed basically announced that it would start to “taper” its bond buying. It would still be printing money to stimulate the economy but it would gradually start to print less.
I haven’t seen anyone who expected what happened next. Interest rates leapt up. Dan’s view is that the economy in the US (and in some other countries) is addicted to pain killers (stimulus) and you only find out just how addicted when you start to try and cut back and the medicine is “tapered”.
This has global significance. With interest rates at essentially zero (who’s happy with the interest on their savings account at the bank) money had moved into emerging markets where interest rates were much higher, the so-called carry-trade. Now, as US interest rates start to rise the bond market is ending a 31-year bull market (if interest rates fall then bonds rise since it is worth more to already own bonds that have the higher old interest rate than new bonds at the low rate). This means it is more attractive to bring money back from emerging markets. The dollar will get stronger. As a result, commodity prices will decline. Housing market will slow due to higher mortgage rates. This will have some effect on unemployment.
This is already causing problems in emerging markets. China is trying to shut down its shadow banking sector (the non SOE banks and insurance companies). Brazil is having a million people riot and is fighting both inflation and anemic growth. India is also battling high inflation and low growth. Russia has anemic growth and terrible demographics. Japan is looking better but has 200% GDP of debt, shrinking population, and a low savings rate (since the population is so old and now living off savings). Europe is in recession but the risk of the Euro imploding seems to have gone away for now, although that could change quickly.
Interest rates are still not where they should be. The rule of thumb is that they should be around 2% above the rate of inflation, to cover the risk premium. Inflation is about 1.5% so interest rates should be 3.5% and currently they are 2.5%. So there is more disruption to come.
None of this looks good for the semiconductor market which, basically, grows as fast as world GDP over any reasonable time period. And there are a couple of other hiccups. The PC market is shrinking and there seems no reason to assume that a new release of Windows 8 or Haswell will fix it. This shows up in low demand and growing inventories.
Growth in tablet computers remains strong but at a much lower price point. Growth in the high end of the smartphone market is also down as the market gets saturated. However, there is huge growth in the mid/low range smartphones in places like China. Don’t forget how big China Mobile is. AT&T+Verizon+Tmobile+Sprint…then double it…still not as big as China Mobile. IT spending should outpace GDP growth…but GDP growth is so weak that is not saying much, driven by cellular buildout of next generation infrastructure.
So, semiconductor sales have been flat for 3 years due to poor global GDP growth and this looks set to continue.
Luckily, capex in semiconductor has been somewhat limited which means that prices should stay reasonably firm since there has not been a huge buildup in overcapacity. But even so, semiconductor demand forecasts seem to be out of step with global industrial growth due largely to optimism. If we build it, they will come.
The end result: the situation is the most unpredictable since 2008.
Aart de Geus gave one of the visionary look to the next 50 years of EDA as a warmup to Stephen Wu’s keynote. EDA is enabling the greatest push-pull ever, part of an exponential change on a scale never before seen.
Technologies seem to go through a 50 year technical push phase (driven by improving the technology) followed by a 50 year economic pull phase (driven by implementation and new ways of using the technology). For a couple of years Aart has been calling this Technomics.
For example, in 1451 Gutenberg invented the printing press (the first lithography!). This created an overnight explosion in the availability of books. A press could produce 3600 pages/day compared to a fraction of a page from a trained monk. By 1500 around 20M volumes had been printed. But the big change would come with the spread of literacy. In 1501 Venetian printer invented mobile form of books and the standardized cheaper books directly impacted self-knowledge and learning in Europe. By the 1500s there were 200M books.
Or in 1750 the first 1 horsepower (HP) steam engines were around. After 50 years of enablement with advances in metallurgy, riveting, piston tolerance and so on (and a lot of exploding boilers) there were about 10,000 HP of steam power installed. Just 15 years later it was 200,000 HP. By 1850 it was a 10[SUP]6[/SUP] exponential. The pull came from powering textiles, pumping mines and once again portability: the first steam locomotives and steamships.
In our own industry, the transistor was invented in 1948. But it is not just transistors, it is boolean algebra, circuit connectivity, hardware/software interfaces and so on that drive the technology. There was a lot of talk about design gap in the 1990s (our boilers exploded too) but today we have a handle on multi-dimensional systemic complexity. In 1948 we were at devices with 1 transistor. Today it is 10[SUP]9[/SUP], take that renaissance. And our font-size is 10[SUP]-9[/SUP], print that Gutenberg. With the FinFET revolution we can see all the way to single digit nm designs.
But isn’t manufacturing getting more expensive?
Firstly, it is unclear, but we are also leaving the tech-push phase of semiconductor and entering the onomic-pull. Aart pointed out that if we improve the technology 10X or 100X more than paying for the technology will be a rounding error, it will bring such opportunities. We are transitioning from cost to value and impact and new revolutionary applications will find the funding.
It won’t be easy. EDA should stand for Extremely Difficult Automation. But EDA is the heart of the heart of hi-tech and so had a great future.
There is a video of Aart’s talk here.
As a semiconductor professional and an Apple customer I’m very interested to see what is inside the iPhone5s. Rumors are spreading, photos are leaking, creating a nice build up to the next release of the mobile device that changed the world.
Honestly, last year I was a bit disappointed with the iPhone5. Inside is the A6 SoC which uses the Samsung 32nm process technology, even though Samsung announced a fully qualified 28nm process in June of 2011 (Can Samsung Deliver?). As a result, rumors swirled that Apple would switch to TSMC 28nm, rumors which I found to be false (TSMC Apple Rumors Debunked). So no, sad to say the iPhone5s will not have a TSMC 28nm SoC. My guess is that it will be Samsung 28nm which is said to be in production now.
Unless the iPhone5s has some cool new features like finger print scan and NFC for quick coffee house purchases, I will probably wait for the TSMC 20nm powered iPhone6 next year.
The other rumor that came out of Taiwan this week from DigiTimes is that Apple signed an agreement with TSMC for 20nm, 16nm, and 10nm. I’m in Taiwan now and can tell you that NOBODY here takes DigiTimes seriously. Same thing goes for Seeking Alpha, DeepChip, SemiAccurate, and other click hungry rumor websites. TSMC has beefed up security in the recent months so I seriously doubt that type of information leaked out here. Apple is also VERY secretive so I think it is just one of those tabloid journalism attempts to catch your eye.
From my discussions at the 50th Design Automation Conference, the top fabless companies are still looking closely at the different FinFET processes, waiting for the final PDKs (Process Design Kits) to be delivered later this year. Given the capacity issues at 28nm (since only TSMC yielded), I fully expect the fabless industry to keep second and even third source FinFET options open. As for who wins the node with the most first source contracts? It will be a tight race between TSMC, GLOBALFOUNDRIES, and Samsung with wafer price being the critical factor. My bet of course is on TSMC since they have the required capacity for mobile and trust is always part of the wafer purchase equation.
From what I know today, all three foundries will be ready for FinFET tape-outs in Q4 of this year. Here is my personal score card for the top fabless semiconductor companies on where they will manufacture FinFET Devices next year:
[LIST=1]
This of course is subject to change when the 1.0 production version of the PDKs (Process Design Kits) are released. TSMC could sweep the entire node like they did at 28nm and 20nm. But for someone to say that any of these companies has signed a foundry deal for 10nm is just silly. 10nm negotiations have just started and will absolutely hinge on who delivers 16nm as promised and at what price. All of this is just my opinion of course but let common sense prevail!
lang: en_US
I first met Michael Munseyback at Viewlogic in the 1990’s, so was pleased to meet with him at DACand get an update on what Dassault Systemes has to offer the EDA world.
Michael Munsey, Dassault Systemes
Continue reading “An EDA update from Dassault Systemes at DAC”
With EDA tool development in San Jose, Beijing and China, ProPlusis probably best known for their device modeling software called BSIMProPlus. At DAC I met with Lianfeng Yang, Ph.D. the VP of Marketing to hear about what’s new.
Lianfeng Yeng, ProPlus
Continue reading “SPICE update from ProPlus at DAC”
