Webinar: 5 Expectations for the Automotive Market in 2026

Webinar: 5 Expectations for the Automotive Market in 2026
by Admin on 09-29-2025 at 11:51 pm

November 20, 2025 – 11:00 AM EST   

November 21, 2025 – 10:00 AM JST/KST

Discover the 5 Critical Automotive Market Trends Reshaping Semiconductors in 2026

AI, vehicle architectures, and trade impacts—what’s next for automotive semiconductors.

The automotive semiconductor industry is navigating a complex landscape of… Read More


Webinar: 5 Expectations for the Connectivity Market in 2026

Webinar: 5 Expectations for the Connectivity Market in 2026
by Admin on 09-29-2025 at 11:49 pm

Discover the 5 Critical Connectivity Market Trends Reshaping Semiconductors in 2026

5G, ambient computing, and RF innovation—what’s next for connectivity semiconductors.

The connectivity semiconductor industry is evolving rapidly as 5G matures, geopolitical shifts influence supply chains, and ambient/always-on computing… Read More


Webinar: 5 Expectations for the Compute Market in 2026

Webinar: 5 Expectations for the Compute Market in 2026
by Admin on 09-29-2025 at 11:47 pm

November 12, 2025 – 11:00 AM EST   

November 13, 2025 – 10:00 AM JST/KST

Discover the 5 Critical Compute Market Trends Reshaping Semiconductors in 2026

Datacenter accelerators, advanced nodes, and geopolitical tensions—what’s next for compute semiconductors.

The compute semiconductor market is entering a transformative… Read More


Webinar: 5 Expectations for the Sensor Market in 2026

Webinar: 5 Expectations for the Sensor Market in 2026
by Admin on 09-29-2025 at 11:45 pm

November 5, 2025 – 11:00 AM EST   

November 6, 2025 – 10:00 AM JST/KST

Discover the 5 Critical Sensor Market Trends Reshaping Semiconductors in 2026

From 8K smartphones to AI at the edge—explore the next generation of image sensor innovation.

The image sensor industry is shifting from traditional pixel scaling to functionality-driven… Read More


Webinar Preview – Addressing Functional ECOs for Mixed-Signal ASICs

Webinar Preview – Addressing Functional ECOs for Mixed-Signal ASICs
by Mike Gianfagna on 09-11-2025 at 10:00 am

Webinar Preview – Addressing Functional ECOs for Mixed Signal ASICs

An engineering change order, or ECO in the context of ASIC design is a way to modify or patch a design after layout without needing to re-implement the design from its starting point. There are many reasons to use an ECO strategy. Some examples include correcting errors that are found in post-synthesis verification, optimizing … Read More


WEBINAR: Functional ECO Solution for Mixed-Signal ASIC Design

WEBINAR: Functional ECO Solution for Mixed-Signal ASIC Design
by Daniel Nenni on 09-04-2025 at 8:00 am

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This webinar, in partnership with Easy-Logic Technology, is to address the complexities and challenges associated with functional ECO (Engineering Change Order) in ASIC design, with a particular focus on mixed-signal designs.

The webinar begins by highlighting the critical role of mixed-signal chips in modern applications,… Read More


WEBINAR: Edge AI Optimization: How to Design Future-Proof Architectures for Next-Gen Intelligent Devices

WEBINAR: Edge AI Optimization: How to Design Future-Proof Architectures for Next-Gen Intelligent Devices
by Daniel Nenni on 07-03-2025 at 10:00 am

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Edge AI is rapidly transforming how intelligent solutions are designed, from smart home devices to autonomous vehicles, healthcare gadgets, and industrial IoT. Yet, architects, chip designers, and product managers frequently grapple with a common and daunting challenge: creating efficient, high-performance AI solutions… Read More


WEBINAR Unpacking System Performance: Supercharge Your Systems with Lossless Compression IPs

WEBINAR Unpacking System Performance: Supercharge Your Systems with Lossless Compression IPs
by Daniel Nenni on 07-03-2025 at 6:00 am

CAST Compression IP Webinar 400x400

In today’s data-driven systems—from cloud storage and AI accelerators to automotive logging and edge computing—every byte counts. The exponential growth in data volumes, real-time processing demands, and constrained bandwidth has made efficient, lossless data compression a mission-critical requirement. Software-based… Read More


Essential Debugging Techniques Workshop

Essential Debugging Techniques Workshop
by Admin on 06-12-2025 at 1:48 pm

Essential Debugging Techniques Workshop

This workshop is for hardware engineers, system architects, and anyone who wants to learn best practices for debugging challenging issues encountered while developing FPGAs, SoCs, PCBs, and embedded systems using the Vivado Design Suite. The features and capabilities of the Vivado

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Webinar: Mastering Clock Domain Crossings (CDC) and Synchronization Techniques

Webinar: Mastering Clock Domain Crossings (CDC) and Synchronization Techniques
by Admin on 06-12-2025 at 1:45 pm

Description

Clock domain crossings (CDCs) are a critical aspect of FPGA and embedded system design, and handling them correctly is essential for reliable operation. In this one-hour webinar, we’ll break down CDC fundamentals, explore best practices for managing single-bit and bus CDCs, and demonstrate how to leverage Xilinx… Read More