This webinar introduces Questa One Sim CX, an innovative coverage-driven simulation solution that revolutionizes SystemVerilog UVM verification workflows.
Traditional coverage closure methods, relying on constrained-random stimulus generation and iterative manual adjustments, often prove time-consuming and resource-intensive.
Rising semiconductor complexity—driven by multi-die architectures, the move towards more advanced technology nodes, and more stringent reliability targets, is dramatically increasing the volume of verification required to achieve DFT verification sign-off.
Come learn how the Questa One DFT Verification solution, combined
Wednesday, June 4 – 8:00 AM Pacific
In today’s automotive electronics, ensuring functional safety is paramount for meeting stringent industry standards. This webinar introduces Questa One Sim FX, a cutting-edge fault simulation platform designed specifically for complex automotive designs. We’ll
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Join us for an insightful webinar where we delve into the latest advancements in Synopsys ARC Processor IP, designed to meet the stringent demands of real-time processing systems across industries. Gain valuable knowledge… Read More
As the semiconductor industry increasingly embraces chiplet-based architectures, the complexity of system integration and verification has grown exponentially. Verifying these modular systems demands new approaches, tools, and collaboration across design and verification… Read More
Explore how cutting-edge tools from Cadence are transforming RF PCB design for wireless, aerospace, and automotive innovations. This webinar showcases the seamless integration of Allegro X and the AWR Design Environment to simplify RF IP integration and streamline full PCB system design. Learn how automation and advanced… Read More
Wednesday, May 28 – 8:00 AM Pacific
Managing traceability across multiple disconnected tools and data is a challenge that often leads to inefficiencies, missed coverage, and increased risk in safety-critical designs.
In this webinar, discover how Questa Verification IQ Testplan Author seamlessly integrates with
Wednesday, May 21 – 8:00 AM Pacific
The semiconductor industry faces a critical Verification Productivity Gap 2.0, driven by increasingly complex technologies including 3DICs, chiplet-based designs, and software-defined architectures.
This challenge is compounded by demands for Enhanced security, Reduced power
This webinar will teach explicit dynamics essentials, focusing on how Ansys LS-DYNA can be used to simulate and analyze dynamic events such as crashes, impacts, and high-speed motion. Attendees will gain hands-on experience with simulation tools and techniques that form the foundation of dynamic analysis in engineering.
This webinar demonstrates the end-to-end technology used in developing an electric powertrain for automotive applications using a model-based systems engineering (MBSE) framework.
DATE:
June 19, 2025
Venue:
Virtual
As automotive electrification accelerates, developing efficient and reliable electric powertrains
