The “Era of the Photon” is here!

The “Era of the Photon” is here!
by Tom Dillinger on 01-02-2016 at 12:00 pm

The 50 year anniversary of the publication of Moore’s Law was recently celebrated, highlighting the tremendous advances in the Microelectronics Eraof the period in human history known as the Information Age. However, the technical and economic challenges currently faced by the microelectronics industry are bringing into… Read More


A Synergistic Chip-Package-System Analysis Methodology

A Synergistic Chip-Package-System Analysis Methodology
by Tom Dillinger on 12-23-2015 at 4:00 pm

Looking back, 2015 was a significant year for mergers and acquisitions in the EDA industry. The Semiwiki team maintains a chronology of major transactions here.

As I was reviewing this compendium, one of the entries that stands out is the acquisition of Apache Design Solutions by Ansys, Inc. a couple of years ago.

At that time, there… Read More


A (R)evolution in Hardware-based Simulation Acceleration

A (R)evolution in Hardware-based Simulation Acceleration
by Tom Dillinger on 11-16-2015 at 9:45 am

The most exciting products in our industry are those that are both evolutionary and revolutionary. Cadence has just announced an update to their hardware simulation acceleration platform – Palladium Z1 – which continues the evolution of the unique capabilities of processor-based acceleration, plus a revolutionary approach… Read More


Extendible Processor Architectures for IoT Applications

Extendible Processor Architectures for IoT Applications
by Tom Dillinger on 10-17-2015 at 7:00 am

The Internet of Things has become a ubiquitous term, to refer to a broad (and somewhat ill-defined) set of electronic products and potential applications – e.g., wearables, household appliances and controllers, medical applications, retail applications (signage, RFID), industrial automation, machine-to-machine communication,… Read More


Optimizing Quality-of-Service in a Network-on-Chip Architecture

Optimizing Quality-of-Service in a Network-on-Chip Architecture
by Tom Dillinger on 10-13-2015 at 12:00 pm

The Linley Group is well-known for their esteemed Microprocessor Report publication, now in its 28th year. Accompanying their repertoire of industry reports, TLG also sponsors regular conferences, highlighting the latest developments in processor architecture and implementation.

One of the highlights of the conference… Read More


A FinFET BSIM-CMG model update from UC-Berkeley

A FinFET BSIM-CMG model update from UC-Berkeley
by Tom Dillinger on 10-06-2015 at 4:00 pm

Every designer relies upon an underlying “compact” device model for circuit simulations – these models are the lifeblood of the IC industry. Designers may not be aware that there is an organization that qualifies models – the Compact Model Coalition – which operates under the umbrella of the Si2 Consortium: http://www.si2.org/cmc_index.phpRead More


Electromigration Analysis and FinFET Self-Heating

Electromigration Analysis and FinFET Self-Heating
by Tom Dillinger on 09-24-2015 at 12:00 pm

FinFET processes provide power, performance, and area benefits over planar technologies. Yet, a vexing problem aggravated by FinFET’s is the greater local device current density, which translates to an increased concern for signal and power rail metal electromigration reliability failures. There is a critical secondary… Read More


Resolution Enhancement Technology – the key to Moore’s Law

Resolution Enhancement Technology – the key to Moore’s Law
by Tom Dillinger on 09-06-2015 at 10:00 am

The ability to extend photolithography utilizing 193i light sources to current process nodes is truly the key technical achievement that has enabled Moore’s Law to continue. The interplay between the exposure equipment, the materials – especially, resists and related coatings – and the fundamental principles… Read More


FinFET vs FDSOI – Which is the Right One for Your Design?

FinFET vs FDSOI – Which is the Right One for Your Design?
by Daniel Nenni on 04-08-2015 at 4:00 am

As a professional conference goer I can see definite trends when it comes to topics and attendance. Thus far this year I have seen a double digit increase in attendance, which is great. The question is why? Why is the fabless semiconductor ecosystem leaving the safety of their cubicles and computer screens in droves to mingle amongst… Read More


FinFETs: Ask the Experts!

FinFETs: Ask the Experts!
by Daniel Nenni on 04-14-2013 at 4:00 pm

On Friday (April 19[SUP]th[/SUP]) I will be keynoting FinFET day at the EDPS conference in Monterey. This is an excellent opportunity to ask the experts about the challenges of FinFET design and manufacturing in an intimate setting (60 people). If you are interested register today and use the promo codeSemiWiki-EDPS-JFR and … Read More