2024 Outlook with Srinivasa Kakumanu of MosChip

2024 Outlook with Srinivasa Kakumanu of MosChip
by Daniel Nenni on 03-27-2024 at 10:00 am

KS MD&CEO MosChip 2024

MosChip is a publicly traded company founded in the year 1999, they offer semiconductor design services, turnkey ASIC, software services, and end-to-end product engineering solutions. The company headquartered in Hyderabad, India, with five design centers and over 1300 engineers located in Silicon Valley (USA), Hyderabad,… Read More


Technology Design Co-Optimization for STT-MRAM

Technology Design Co-Optimization for STT-MRAM
by Tom Dillinger on 01-04-2022 at 6:00 am

sense amplifier

Previous SemiWiki articles have described the evolution of embedded non-volatile memory (eNVM) IP from (charge-based) eFlash technology to alternative (resistive) bitcell devices.  (link, link)

The applications for eNVM are vast, and growing.  For example, microcontrollers (MCUs) integrate non-volatile memory for … Read More


MRAM Magnetic Immunity – Empirical Study Summary

MRAM Magnetic Immunity – Empirical Study Summary
by Mads Hommelgaard on 03-28-2021 at 10:00 am

MRAM Magnetic Immunity

The main threat for the wide adoption of MRAM memories continues to be their lack of immunity to magnetic fields. MRAM magnetic immunity (MI) levels has seen significant research over the years and new data is continuously published from the main MRAM vendors.

This data, however, is rarely compared to magnetic field exposure scenarios… Read More


Embedded MRAM for High-Performance Applications

Embedded MRAM for High-Performance Applications
by Tom Dillinger on 06-21-2020 at 10:00 am

embedded memory requirements

Summary
A novel spin-transfer torque magnetoresistive memory (STT-MRAM) IP offering provides an attractive alternative for demanding high-performance embedded applications.

Introduction
There is a strong need for embedded non-volatile memory IP across a wide range of applications, as depicted in the figure below.

The… Read More


TSMC 32Mb Embedded STT-MRAM at ISSCC2020

TSMC 32Mb Embedded STT-MRAM at ISSCC2020
by Don Draper on 03-20-2020 at 6:00 am

Fig. 1. Cross section of the STT MRAM bit cell in BEOL metallization layers between M1 and M5.

32Mb Embedded STT-MRAM in ULL 22nm CMOS Achieves 10ns Read Speed, 1M Cycle Write Endurance, 10 Years Retention at 150C and High Immunity to Magnetic Field Interference presented at ISSCC2020

1.  Motivation for STT-MRAM in Ultra-Low-Leakage 22nm Process

TSMC’s embedded Spin-Torque Transfer Magnetic Random Access Memory (STT-MRAM)… Read More


My Top Three Reasons to Attend IEDM 2019

My Top Three Reasons to Attend IEDM 2019
by Scotten Jones on 10-11-2019 at 6:10 am

The International Electron Devices Meeting is a premier event to learn about the latest in semiconductor process technology. Held every year in early December is San Francisco this years conference will be held  from Decembers 7th through December 11th. You can learn more about the conference at their web site here.

This is a must… Read More


TechInsights Gives Memory Update at IEDM18 DRAM and Emerging Memories

TechInsights Gives Memory Update at IEDM18 DRAM and Emerging Memories
by BHD on 04-17-2019 at 12:00 pm

On the Sunday evening at IEDM last year, TechInsights held a reception in which Arabinda Das and Jeongdong Choe gave presentations that attracted a roomful of conference attendees.

This is the second part of the review of Jeongdong’s talk, we covered NAND flash technology in the last post. Jeongdong is a Senior Technical… Read More


STT-MRAM – Coming soon to an SoC near you

STT-MRAM – Coming soon to an SoC near you
by Tom Dillinger on 07-05-2016 at 4:00 pm

An increasing percentage of SoC die area is being allocated to memory arrays, as applications require more data/instruction storage and boot firmware. Indeed, foundries invest considerable R&D resources into optimizing their array technology IP offerings, often with more aggressive device features than used for other… Read More