CEO Interview: John O’Donnel of yieldHUB

CEO Interview: John O’Donnel of yieldHUB
by Daniel Nenni on 06-26-2020 at 10:00 am

John ODonnell CEO 150

Let me introduce John O’Donnell, CEO of yieldHUB. After earning a degree in microelectronics John spent 18 years at Analog Devices before founding yieldHUB in 2005. If anybody knows yield it is Analog Devices having shipped billions upon billions of chips, absolutely.

SemiWiki will be digging deeper into the technology… Read More


Nobody Ever Lost Their Job for Spending too Much on Hardware Verification, Did They?

Nobody Ever Lost Their Job for Spending too Much on Hardware Verification, Did They?
by Daniel Nenni on 06-25-2020 at 6:00 am

Silicon Bug Cost Scenario

A paper was published last month on the Acuerdo Consultancy Services website authored by Joe Convey of Acuerdo and Bryan Dickman of Valytic Consulting. Joe and Bryan spent combined decades in the Semi and EDA World which means they have a great understanding of hardware bugs first hand, absolutely.

Here is a quick summary… Read More


Embedded MRAM for High-Performance Applications

Embedded MRAM for High-Performance Applications
by Tom Dillinger on 06-21-2020 at 10:00 am

embedded memory requirements

Summary
A novel spin-transfer torque magnetoresistive memory (STT-MRAM) IP offering provides an attractive alternative for demanding high-performance embedded applications.

Introduction
There is a strong need for embedded non-volatile memory IP across a wide range of applications, as depicted in the figure below.

The… Read More


Fractal CEO Update 2020

Fractal CEO Update 2020
by Daniel Nenni on 06-16-2020 at 10:00 am

Fractal Technologies SemiWiki

Rene Donkers, the company’s Co-founder and CEO, started his EDA career at Sagantec where he became responsible for world wide customer support and operations management. Ten years ago, Rene and a handful of people noticed a need in the design community for a standardized (portable) IP Validation approach to replace internal… Read More


Webinar: Optimize SoC Glitch Power with Accurate Analysis from RTL to Signoff

Webinar: Optimize SoC Glitch Power with Accurate Analysis from RTL to Signoff
by Mike Gianfagna on 06-16-2020 at 6:00 am

Screen Shot 2020 06 15 at 6.59.34 PM

I had the opportunity to preview an upcoming webinar from Synopsys on SoC Glitch Power – what it is and how to reduce it. There is some eye-opening information in this webinar. Glitch power is a bigger problem than you may think and Synopsys has some excellent strategies to help reduce the problem. The webinar is available via replay… Read More


Silicon Catalyst Announces a New Startup Ecosystem for MEMS Led by Industry Veteran Paul Pickering and supported by STMicroelectronics

Silicon Catalyst Announces a New Startup Ecosystem for MEMS Led by Industry Veteran Paul Pickering and supported by STMicroelectronics
by Mike Gianfagna on 06-12-2020 at 10:00 am

Screen Shot 2020 06 12 at 8.46.22 AM

A little over a month ago, I wrote about the substantial support that Silicon Catalyst and Arm were providing for chip startups. There have been many incubators for technology companies over the years. These organizations typically provide office space, some basic infrastructure, advisory help and sometimes access to seed … Read More


CEO Interview: Johnny Shen of Alchip

CEO Interview: Johnny Shen of Alchip
by Daniel Nenni on 06-10-2020 at 10:00 am

Alchip IPO Johhny Shen Kinying Kwan 1

Alchip was founded in 2003 by a group of Silicon Valley veterans that followed a similar path of working for semiconductor companies then moving to the EDA/IP/ASIC ecosystem. In fact, I used to play basketball with the Alchip co-founder/chairman during that time and can tell you he is a fierce competitor. Good thing too because … Read More


Welcome Samtec and System Design on SemiWiki

Welcome Samtec and System Design on SemiWiki
by Mike Gianfagna on 06-08-2020 at 10:00 am

Samtec Cables in Action

I always enjoy welcoming new corporate members to the SemiWiki platform. Each company brings new technology, a different perspective and the opportunity for the SemiWiki community to hear about another aspect of chip design and manufacturing. But this introduction is different. This time, a new corporate member is opening … Read More


Feature-Selective Etching in SAQP for Sub-20 nm Patterning

Feature-Selective Etching in SAQP for Sub-20 nm Patterning
by Fred Chen on 06-02-2020 at 10:00 am

Feature Selective Etching in SAQP for Sub 20 nm Patterning

Self-aligned quadruple patterning (SAQP) is the most widely available technology used for patterning feature pitches less than 38 nm, with a projected capability to reach 19 nm pitch. It is actually an integration of multiple process steps, already being used to pattern the fins of FinFETs [1] and 1X DRAM [2]. These steps, shown… Read More


Tortuga Logic CEO Update 2020

Tortuga Logic CEO Update 2020
by Daniel Nenni on 06-01-2020 at 6:00 am

Jason Oberg

We started working with Tortuga Logic two years ago beginning with a CEO interview so it is time to do an update. The venerable Dr. Bernard Murphy did the first interview with Jason which is worth reading again, absolutely.

Security is also one of the vertical markets we track which has been trending up for the last two years. In looking

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