The world semiconductor market grew a slight 0.4% in 2011, according to WSTS. In early 2011, expectations were for growth in the 6% to 10% range. Various natural and man-made disasters lead to weaker than expected growth. The March 2011 earthquake and tsunami in Japan disrupted semiconductor and electronics production. Floods… Read More
Tag: semiconductor
Universal Flash Storage: Webinar
There has been a general trend for over a decade now towards the use of very fast serial interfaces instead of wide parallel interfaces. This has been driven by a number of different factors ranging from the lack of pins on an SoC, the difficulty of keeping wide parallel interfaces free of skew, limitations on printed circuit board… Read More
3D-IC Physical Design
When process nodes reached 28 nm and below, it appeared that design density is reaching a saturation point, hitting the limits of Moore’s law. I was of the opinion that the future of microelectronic physical design was limited to 20 and 14 nm being addressed by technological advances such as FinFETs, double patterning, HKMG (High-k… Read More
Pinpoint: Getting Control of Design Data
Back in the Napoleonic era it was possible to manage a battle with very ad hoc methods. Sit on a horse on top of the highest hill and watch the battle unfold, send messengers out with instructions. By the First World War, never mind the second, that approach was hopelessly outdated and a much more structured way of managing a battle was… Read More
What Changed On My Transistor-Level Schematic?
Digital designers have used diff tools for years on their text-based HDL source code, but what about for the transistor-level IC designer, where is their diff tool for schematics or layout?… Read More
DFM Provides Proven Value
Although design for manufacturing (DFM) tools and techniques have been around for several nodes, a lot of designers remain skeptical about their actual value, especially since many products still make it successfully to market without the use of DFM.… Read More
DFM Industry Survey
As part of the DFM Conference at the SPIE Advance Lithography symposium, the DFM committee is conducting an informal survey on the current state of Design For Manufacturability in the Semiconductor Industry.
Please take this anonymous 16 question survey to identify critical Design for Manufacturability (DFM) issues facing… Read More
DFM at SPIE Advance Litho show
This year’s SPIE Advanced Lithography is loaded with interesting keynotes and sessions. To help me narrow down what to see, I spoke with John Sturtevant. John is co-chair of the Design for Manufacturability through Design-Process Integration conference, and the director for technical marketing for RET products at Mentor Graphics.… Read More
AMD and GlobalFoundries?
One thing I do as an internationally recognized semiconductor blogger is listen to the quarterly conference calls of companies that drive our industry. TSMC is always interesting, I really like the honesty and vision of Dr. Morris Chang. Cadence is good, I always want to hear what Lip-Bu Tan has to say. Oracle and Larry Ellison, … Read More
3D Standards
At DesignCon this week there was a panel on 3D standards organized by Si2. I also talked to Aveek Sarkar of Apache (a subsidiary of Ansys) who is one of the founding member companies of the Si2 Open3D Technical Advisory Board (TAB), along with Atrenta, Cadence, Fraunhofer Institute, Global Foundries, Intel, Invarian, Mentor, Qualcomm,… Read More