I recently read a news article where the author referred to Moore’s Law as a ‘Law of Science discovered by an Intel engineer’. Readers of SemiWiki would call that Dilbertesque. Gordon Moore was Director of R&D at Fairchild Semiconductor in 1965 when he published his now-famous paper on integrated electronic… Read More
At the Linley processor conference this week, Chris Rowen, the CTO of Tensilica presented on the protocol processing dataplane. That sounds superficially like he is talking about networking but in fact true protocol processing is just part of adding powerful compute features to the dataplane. Other applications are video, … Read More
I was at the Linley Processor Conference yesterday. There are two of these each year, one focused on mobile and this one, focused on networking and communications (so routers, base-stations and the like). You probably know that ARM is pretty dominant in mobile handsets (and Intel is trying to get a toe-hold although I’m skeptical… Read More
It was in June of last year that Tensilica announced that they (or rather their licensees) had shipped one billion cores. Now they have just announced that they have shipped two billion cores. They are shipping at a run-rate of 800 million cores per year, which is 50% higher than June last year. If business continues to grow they will… Read More
ICCAD is November 5th to 8th in the Hilton San Jose (downtown).
It is very off topic, but if you are British then November 5th is the rough equivalent of July 4th when there are fireworks displays all over the country. Britain is one of very few countries that transitioned from some sort of autocracy to a democracy without having a revolution.… Read More
As SoC design has transformed from being about writing RTL and more towards IP assembly, the issue of IP quality has become increasingly important. In 2011 TSMC and Atrenta launched the soft IP qualification program. Since then, 13 partners have joined the program.
IP quality is multi-faceted but at the most basic level, an IP block… Read More
Coming up are ANSYS/Apache seminars on Dimensions of Electronic Design. Watch the video where Arvind Shanmugavel gives some details about why you should attend. Probably most readers are in Silicon Valley, and the seminar here is on 18th at the Hyatt (next to Santa Clara convention center).
The seminars are free to qualified attendees.… Read More
Andrea Casotto, the CEO of RTDA, started the company in Alameda in 1995, initially by himself, to market the FlowTracer software technology.
The early version of the technology was created as part of his PhD thesis at UC Berkeley, when Andrea sought automated ways to help engineering students who were having problems using EDA … Read More
While reading an article on DeepChip I found an interesting comment from Rafaela Novais, a Design Support Manager at TowerJazz Semi and decided to interview her to learn more about her experience as an IC designer and EDA tool user.
IC designers of passive devices often use empirical approaches to perform High Frequency Analysis (HFA), however there is at least one new approach being offered by Mentor Graphics using a tool flow of:
