There’s a lot to unpack in the title of this post. First, Siemens EDA is the new name for Mentor, a Siemens Business. The organization continues to operate as part of Siemens Digital Industries Software. The organization has released a white paper that describes research done with the American University of Armenia. The work examines… Read More
Tag: machine learning
Tempus: Delivering Faster Timing Signoff with Optimal PPA
In July, I explored the benefits of the new Cadence Tempus™ Power Integrity Solution. In that piece, I explored some of the unique capabilities of this new tool with Brandon Bautz, senior product management group director and Hitendra Divecha, product management director in the Digital & Signoff Group at Cadence. I recently… Read More
Alchip at TSMC OIP – Reticle Size Design and Chiplet Capabilities
This is another installment covering TSMC’s very popular Open Innovation Platform event (OIP), held on August 25. This event presents a diverse and high-impact series of presentations describing how TSMC’s vast ecosystem collaborates with each other and with TSMC. This presentation is from Alchip, presented by James Huang,… Read More
Cadence Increases Verification Efficiency up to 5X with Xcelium ML
SoC verification has always been an interesting topic for me. Having worked at companies like Zycad that offered hardware accelerators for logic and fault simulation, the concept of reducing the time needed to verify a complex SoC has occupied a lot of my thoughts. The bar we always tried to clear was actually simple to articulate… Read More
DAC Panel: Cadence Weighs in on AI for EDA, What Applications, Where’s the Data?
DAC was full of great panels, research papers and chip design stories this year, the same as other years. Being a virtual show, there were some differences of course. I’ve heard attendance was way up, allowing a lot more folks to experience the technical program. This is likely to be true for a virtual event. I’m sure we’ll see more… Read More
The Future of Chip Design with the Cadence iSpatial Flow
A few months ago, I wrote about the announcement of a new digital full flow from Cadence. In that piece, I focused on the machine learning (ML) aspects of the new tool. I had covered a discussion with Cadence’s Paul Cunningham a week before that explored ML in Cadence products, so it was timely to dive into a real-world example of the … Read More
A Compelling Application for AI in Semiconductor Manufacturing
There have been a multitude of announcements recently relative to the incorporation of machine learning (ML) methods into EDA tool algorithms, mostly in the physical implementation flows. For example, deterministic ML-based decision algorithms applied to cell placement and signal interconnect routing promise to expedite… Read More
Key Applications for Chip Monitoring
One of the side benefits of working with SemiWiki is that you get to meet a broad range of people and in the semiconductor industry that means a broad range of very smart people, absolutely. Recently I had the pleasure to meet Richard McPartland of Moortec. Richard and I started in the semiconductor industry at the same time but from… Read More
TinyML Makes Big Impact in Edge AI Applications
Machine Learning (ML) has become extremely important for many computing applications, especially ones that involve interacting with the physical world. Along with this trend has come the development of many specialized ML processors for cloud and mobile applications. These chips work fine in the cloud or even in cars or phones,… Read More
Specialized Accelerators Needed for Cloud Based ML Training
The use of machine learning (ML) to solve complex problems that could not previously be addressed by traditional computing is expanding at an accelerating rate. Even with advances in neural network design, ML’s efficiency and accuracy are highly dependent on the training process. The methods used for training evolved from CPU… Read More