DAC Panel: Cadence Weighs in on AI for EDA, What Applications, Where’s the Data?

DAC Panel: Cadence Weighs in on AI for EDA, What Applications, Where’s the Data?
by Mike Gianfagna on 07-29-2020 at 6:00 am

Drivers of Convergence in Computational Software

DAC was full of great panels, research papers and chip design stories this year, the same as other years. Being a virtual show, there were some differences of course. I’ve heard attendance was way up, allowing a lot more folks to experience the technical program.  This is likely to be true for a virtual event. I’m sure we’ll see more… Read More


The Future of Chip Design with the Cadence iSpatial Flow

The Future of Chip Design with the Cadence iSpatial Flow
by Mike Gianfagna on 07-06-2020 at 10:00 am

Screen Shot 2020 06 20 at 2.30.57 PM

A few months ago, I wrote about the announcement of a new digital full flow from Cadence. In that piece, I focused on the machine learning (ML) aspects of the new tool. I had covered a discussion with Cadence’s Paul Cunningham a week before that explored ML in Cadence products, so it was timely to dive into a real-world example of the … Read More


A Compelling Application for AI in Semiconductor Manufacturing

A Compelling Application for AI in Semiconductor Manufacturing
by Tom Dillinger on 07-06-2020 at 6:00 am

AI opportunities

There have been a multitude of announcements recently relative to the incorporation of machine learning (ML) methods into EDA tool algorithms, mostly in the physical implementation flows.  For example, deterministic ML-based decision algorithms applied to cell placement and signal interconnect routing promise to expedite… Read More


Webinar Series: Digital Implementation and Machine Learning

Webinar Series: Digital Implementation and Machine Learning
by Admin on 06-16-2020 at 6:37 am

Webinar Series

Webinars are chosen during registration

Digital Implementation Flow Automation and Vivid Design Metrics Visualisation

June 10, 2020; 15:00 (UKT) 16:00 (CEST) 17:00 (EEST/IDT)

Speaker: Benoir Carpentier

Creating a final design is a sequence of operations from RTL synthesis, through implementation to sign-off.

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Optimizing power and increasing data throughput in advanced multi-core AI/ML/DL devices

Optimizing power and increasing data throughput in advanced multi-core AI/ML/DL devices
by Daniel Nenni on 05-07-2020 at 10:00 am

If you are working on complex Artificial Intelligence (AI) or Machine Learning (ML) or Deep Learning (DL) designs using advanced node processes, you will understand the motivations for optimising CPU utilisation, device power and processing speed. Cutting-edge AI, ML & DL chips, by their very nature, are susceptible to… Read More


Key Applications for Chip Monitoring

Key Applications for Chip Monitoring
by Daniel Nenni on 04-24-2020 at 2:00 pm

Richard McPartland

One of the side benefits of working with SemiWiki is that you get to meet a broad range of people and in the semiconductor industry that means a broad range of very smart people, absolutely. Recently I had the pleasure to meet Richard McPartland of Moortec. Richard and I started in the semiconductor industry at the same time but from… Read More


TinyML Makes Big Impact in Edge AI Applications

TinyML Makes Big Impact in Edge AI Applications
by Tom Simon on 02-12-2020 at 10:00 am

TimyML ECM3532 Architecture

Machine Learning (ML) has become extremely important for many computing applications, especially ones that involve interacting with the physical world. Along with this trend has come the development of many specialized ML processors for cloud and mobile applications. These chips work fine in the cloud or even in cars or phones,… Read More


Specialized Accelerators Needed for Cloud Based ML Training

Specialized Accelerators Needed for Cloud Based ML Training
by Tom Simon on 01-27-2020 at 10:00 am

AI Domain Specific Processor

The use of machine learning (ML) to solve complex problems that could not previously be addressed by traditional computing is expanding at an accelerating rate. Even with advances in neural network design, ML’s efficiency and accuracy are highly dependent on the training process. The methods used for training evolved from CPU… Read More


Autonomous Driving Still Terra Incognita

Autonomous Driving Still Terra Incognita
by Bernard Murphy on 12-12-2019 at 6:00 am

Whither self-driving?

I already posted on one automotive panel at this year’s Arm TechCon. A second I attended was a more open-ended discussion on where we’re really at in autonomous driving. Most of you probably agree we’ve passed the peak of the hype curve and are now into the long slog of trying to connect hope to reality. There are a lot of challenges, … Read More


Characteristics of an Efficient Inference Processor

Characteristics of an Efficient Inference Processor
by Tom Dillinger on 12-11-2019 at 10:00 am

The market opportunities for machine learning hardware are becoming more succinct, with the following (rather broad) categories emerging:

  1. Model training:  models are evaluated at the “hyperscale” data center;  utilizing either general purpose processors or specialized hardware, with typical numeric precision of 32-bit
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