State-of-the-art electronics demand high performance, low power consumption, small footprint and high reliability from their semiconductor products. While this imperative is true across many different market segments, it is critical for applications such as the automotive/autonomous driving and data centers. As electronic… Read More
Tag: machine learning
AI and Machine Unlearning: Navigating the Forgotten Path
In the rapidly evolving landscape of artificial intelligence (AI), the concept of machine unlearning has emerged as a fascinating and crucial area of research. While the traditional paradigm of AI focuses on training models to learn from data and improve their performance over time, the notion of unlearning takes a step further… Read More
Quadric’s Chimera GPNPU IP Blends NPU and DSP to Create a New Category of Hybrid SoC Processor
Performance, Power and Area (PPA) are the commonly touted metrics in the semiconductor industry placing PPA among the most widely used acronyms relating to chip development. And rightly so as these three metrics greatly impact all electronic products that are developed. The degree of impact depends of course on the specific … Read More
Intellectual Abilities of Artificial Intelligence (AI)
To understand AI’s capabilities and abilities we need to recognize the different components and subsets of AI. Terms like Neural Networks, Machine Learning (ML), and Deep Learning, need to be define and explained.
In general, Artificial intelligence (AI) refers to the simulation of human intelligence in machines that are programmed… Read More
Machine Learning in the Fab at #59DAC
It used to be true that a foundry or fab would create a set of DRC files, provide them to designers, and then the process yield would be acceptable, however if the foundry knows more details about the physical implementation of IC designs then they can improve the yield. Using a digital twin of the design, process and metrology steps… Read More
Using AI in EDA for Multidisciplinary Design Analysis and Optimization
Most IC and system engineers follow a familiar process when designing a new product: create a model, use parameters for the model, simulate the model, observe the results, compare results versus requirements, change the parameters or model and repeat until satisfied or it’s time to tape out. On the EDA side, most tools perform… Read More
CEO Interview: Veerbhan Kheterpal of Quadric.io
It was my pleasure to meet Veerbhan Kheterpal. Veerbhan has founded three technology companies and has full stack expertise spanning software to silicon across Edge & Datacenter applications. Currently, he is a CEO & co-founder of quadric.io, a company that has created a new processor architecture for high performance… Read More
Using Machine Learning to Improve EDA Tool Flow Results
Back in 2020 I first learned from Synopsys about how they had engineered a better way to do optimize layouts on digital designs by using machine learning techniques, instead of relying upon manual approaches. The product was named DSO.ai, standing for Design Space Optimization, and it produced a more optimal floor-plan in less… Read More
An FPGA-Based Solution for a Graph Neural Network (GNN) Accelerator
Earlier this year, Achronix made a product announcement about shipping the industry’s highest performance Speedster7t FPGA devices. The press release included lot of details about the architecture and features of the device and how that family of devices is well suited to satisfy the demands of the artificial intelligence … Read More
Cerebrus, the ML-based Intelligent Chip Explorer from Cadence
Electronic design automation (EDA) has come a long way from its beginnings. It has enabled chip engineers from specifying designs directly in layout format during the early days to today’s capture in RTL format. Every advance in EDA has made the task of designing a chip easier and increased the design team productivity, enabling… Read More