On Wednesday, February 21st Intel held their first Foundry Direct Connect event. The event had both public and NDA sessions, and I was in both. In this article I will summarize what I learned (that is not covered by NDA) about Intel’s business, process, and wafer fab plans (my focus is process technology and wafer fabs).
Tag: intel
ISS 2024 – Logic 2034 – Technology, Economics, and Sustainability
For the 2024 SEMI International Strategy Symposium I was challenged by members of the organizing committee to look at where logic will be in ten years from a technology, economics, and sustainability perspective. The following is a discussion of my presentation.
To understand logic, I believe it is useful to understand what makes… Read More
Intel should be the Free World’s Plan A Not Plan B, and we need the US Government to step in
There are trillions of dollars at stake with AI and huge geopolitical consequences. However, the weak foundation to American technological power is their dependence on Taiwan and TSMC, which is where most advanced silicon is manufactured. America has also been taking China to the ropes lately in their economic/technology proxy… Read More
Podcast EP205: A Multi-Decade View of Process and Device Innovation at Intel with Paul Fischer
Dan is joined by Paul Fischer. Paul is the director of Chip Mesoscale Processing in Intel’s Components Research. He and his team are currently working on Gallium Nitride for energy efficient power delivery and RF communications, and technologies for heterogeneous monolithic integration.
Paul discusses the innovations… Read More
IEDM 2023 – Imec CFET
At IEDM 2023, Naoto Horiguchi presented on CFETs and Middle of Line integration. I had a chance to speak with Naoto about this work and this write up is based on his presentation at IEDM and our follow up discussion. I always enjoy talking to Naoto, he is one of the leaders in logic technology development, explains the technology in … Read More
How Disruptive will Chiplets be for Intel and TSMC?
Chiplets (die stacking) is not new. The origins are deeply rooted in the semiconductor industry and represent a modular approach to designing and manufacturing integrated circuits. The concept of chiplets has been energized as a response to the recent challenges posed by the increasing complexity of semiconductor design. … Read More
IEDM: What Comes After Silicon?
The annual International Electron Devices Meeting (IEDM) took place last month. One of the presentations on the short course was by Matthew Metz of Intel titled New Materials Systems for Moore’s Law Continuation. In essence this was a look at some of the possibilities for what comes after silicon runs out of steam.
Matthew started… Read More
IEDM 2023 – Modeling 300mm Wafer Fab Carbon Emissions
For the first time ever, IEDM held a sustainability session at the 2023 conference. I was one of the authors who presented an invited paper, the following is a summary of my presentation.
Call to Action
From the United Nations [1]:
“Climate Change is the defining issue of our time, and we are at a defining moment.”
“Without drastic … Read More
Is Intel cornering the market in ASML High NA tools? Not repeating EUV mistake
- Reports suggest Intel will get 6 of 10 ASML High NA tools in 2024
- Would give Intel a huge head start over TSMC & Samsung
- A big gamble but a potentially huge pay off
- Does this mean $4B in High NA tool sales for ASML in 2024?
News suggests Intel will get 6 of first 10 High NA tools made by ASML in 2024
An industry news source, Trendforce, reports… Read More
Podcast EP198: How Lightmatter Creates the Foundation for the Next Moore’s Law with Ritesh Jain
Dan is joined by Ritesh Jain. Ritesh is the senior vice president of engineering and operations for Lightmatter. Prior to joining Lightmatter, Ritesh was a vice president in Intel’s Data Center and AI group where he directed the hardware development across silicon packaging, power integrity, signal integrity, mechanical &… Read More