At IEDM 2023, Naoto Horiguchi presented on CFETs and Middle of Line integration. I had a chance to speak with Naoto about this work and this write up is based on his presentation at IEDM and our follow up discussion. I always enjoy talking to Naoto, he is one of the leaders in logic technology development, explains the technology in … Read More
Tag: intel
How Disruptive will Chiplets be for Intel and TSMC?
Chiplets (die stacking) is not new. The origins are deeply rooted in the semiconductor industry and represent a modular approach to designing and manufacturing integrated circuits. The concept of chiplets has been energized as a response to the recent challenges posed by the increasing complexity of semiconductor design. … Read More
IEDM: What Comes After Silicon?
The annual International Electron Devices Meeting (IEDM) took place last month. One of the presentations on the short course was by Matthew Metz of Intel titled New Materials Systems for Moore’s Law Continuation. In essence this was a look at some of the possibilities for what comes after silicon runs out of steam.
Matthew started… Read More
IEDM 2023 – Modeling 300mm Wafer Fab Carbon Emissions
For the first time ever, IEDM held a sustainability session at the 2023 conference. I was one of the authors who presented an invited paper, the following is a summary of my presentation.
Call to Action
From the United Nations [1]:
“Climate Change is the defining issue of our time, and we are at a defining moment.”
“Without drastic … Read More
Is Intel cornering the market in ASML High NA tools? Not repeating EUV mistake
- Reports suggest Intel will get 6 of 10 ASML High NA tools in 2024
- Would give Intel a huge head start over TSMC & Samsung
- A big gamble but a potentially huge pay off
- Does this mean $4B in High NA tool sales for ASML in 2024?
News suggests Intel will get 6 of first 10 High NA tools made by ASML in 2024
An industry news source, Trendforce, reports… Read More
Podcast EP198: How Lightmatter Creates the Foundation for the Next Moore’s Law with Ritesh Jain
Dan is joined by Ritesh Jain. Ritesh is the senior vice president of engineering and operations for Lightmatter. Prior to joining Lightmatter, Ritesh was a vice president in Intel’s Data Center and AI group where he directed the hardware development across silicon packaging, power integrity, signal integrity, mechanical &… Read More
UCIe InterOp Testchip Unleashes Growth of Open Chiplet Ecosystem
Intel recently made headlines when CEO Pat Gelsinger unveiled the world’s first UCIe interoperability test chip demo at Innovation 2023. The test chip built using advanced packaging technology is codenamed Pike Creek and is used to demonstrate interoperability across chiplets designed by Intel and Synopsys. More details … Read More
Predicting Stochastic Defectivity from Intel’s EUV Resist Electron Scattering Model
The release and scattering of photoelectrons and secondary electrons in EUV resists has often been glossed over in most studies in EUV lithography, despite being a fundamental factor in the image formation. Fortunately, Intel has provided us with a laboriously simulated electron release and scattering model, using the GEANT4… Read More
Semiconductors Headed Toward Strong 2024
The global semiconductor market is now solidly in a turnaround. WSTS revised its data for 2Q 2023 growth over 1Q 2023 to 6.0% from 4.2% previously. 3Q 2023 was up 6.3% from 2Q 2023. With our Semiconductor Intelligence forecast of 3% growth in 4Q 2023, the year-to-year growth in 4Q 2023 will be a positive 6%. This will set the stage for… Read More
KLAC- OK quarter in ugly environment- Big China $ – Little Process $ – Legacy good
- KLA has an OK quarter in an ugly market- bouncing along bottom
- Like Lam & ASML, China was huge at 43% represents more risk
- 2/3 Foundry/logic, 1/3 memory – Process tools were weak
- No change, stable , no visibility on recovery
Quarter and guide were good in continued ugly industry
As expected KLAC reported earnings at the … Read More