Learning about 3D IC Design and Test, IEEE Workshop on Friday, December 9th in Newport Beach, CA

Learning about 3D IC Design and Test, IEEE Workshop on Friday, December 9th in Newport Beach, CA
by Daniel Payne on 11-19-2011 at 4:42 pm

The IEEE has an Orange Country Chapter of the Components, Packaging and Manufacturing Technology Society who are organizing an all-day workshop, 3D Integrated Circuits: Technologies Enabling the Revolution. This looks to be an informative day with real-world examples in both design and test being presented by over a dozen … Read More


AMD and GlobalFoundries / TI and UMC

AMD and GlobalFoundries / TI and UMC
by Daniel Nenni on 04-11-2011 at 11:38 am

There have been some significant foundry announcements recently that if collated will give you a glimpse into the future of the semiconductor industry. So let me do that for you here.

First the candid EETimes article about TI dumping Samsung as a foundry:

Taiwan’s UMC will take the ”lead role’’ in making the OMAP 5 device onRead More


Atrenta Semiconductor Design in 3D!

Atrenta Semiconductor Design in 3D!
by Daniel Nenni on 06-27-2010 at 7:04 pm

My vote for most compelling technology at #47DAC is 3D technology. No, I don’t mean Hollywood-style 3D, I’m talking about vertical stacked-die system on chip design. This design approach basically means putting different parts of the system on different silicon substrates, so you can use the right technology for each part, and… Read More