CadenceTECHTALK: Static and Dynamic IR Drop Analysis for Thermal Integrity of High-Performance PCB Designs

CadenceTECHTALK: Static and Dynamic IR Drop Analysis for Thermal Integrity of High-Performance PCB Designs
by Admin on 06-14-2022 at 12:00 am

 

As boards become smaller and faster, the environment for thermal issues becomes increasingly challenging. The thermal management of significant resistive losses in PCB and package structures is critical, especially because these resistive losses are also temperature-dependent, making dynamic and static IR drop

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Five Reasons Why a High Performance Reconfigurable SmartNIC Demands a 2D NoC

Five Reasons Why a High Performance Reconfigurable SmartNIC Demands a 2D NoC
by Kalar Rajendiran on 11-04-2021 at 6:00 am

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As part of their webinar series, SemiWiki hosted one in June with the title “Five Reasons Why a High Performance Reconfigurable SmartNIC Demands a 2D NoC.” The talk by given by Scott Schweitzer, Sr. Manager, Product Planning at Achronix. Scott is a lifelong technology evangelist and focuses on recognizing technology trends and… Read More


De-Risking High-Speed RF Designs from Electromagnetic Crosstalk Issue

De-Risking High-Speed RF Designs from Electromagnetic Crosstalk Issue
by Mike Gianfagna on 02-12-2020 at 6:00 am

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At DesignCon 2020, ANSYS sponsored a series of very high-quality presentations.  Some focused on advanced methods and new technology exploration and some provided head-on, practical and actionable capabilities to improve advanced designs. The presentation I will discuss here falls into the latter category. The topic was… Read More


It’s The Small Stuff That Gets You …

It’s The Small Stuff That Gets You …
by Mike Gianfagna on 02-10-2020 at 6:00 am

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The last session I attended at DesignCon 2020 wasn’t a session at all. Rather it was an interactive discussion with Todd Westerhoff, product manager for electronic board systems at Mentor Graphics. Todd made some observations about the way high-performance PCBs are designed today and perhaps the way they should be designed. … Read More


Platform ASICs Target Datacenters, AI

Platform ASICs Target Datacenters, AI
by Bernard Murphy on 07-17-2018 at 7:00 am

There is a well-known progression in the efficiency of different platforms for certain targeted applications such as AI, as measured by performance and performance/Watt. The progression is determined by how much of the application can be run with specialized hardware-assist rather than software, since hardware can be faster… Read More


More Than Your Average IP Development Kit

More Than Your Average IP Development Kit
by Bernard Murphy on 02-13-2018 at 7:00 am

When I think of an IP development kit, I imagine software plus a hardware model I can run on a prototyper or, closer to the kits offered by semi companies, software plus a board hosting an FPGA implementation of the IP along with DDR memory, flash and a variety of interfaces. These approaches work well for IP providers because hardware… Read More


DSP-Based Neural Nets

DSP-Based Neural Nets
by Bernard Murphy on 10-24-2017 at 7:00 am

You may be under the impression that anything to do with neural nets necessarily runs on a GPU. After all, NVIDIA dominates a lot of what we hear in this area, and rightly so. In neural net training, their solutions are well established. However, GPUs tend to consume a lot of power and are not necessarily optimal in inference performance… Read More


Embedding FPGA IP

Embedding FPGA IP
by Bernard Murphy on 09-05-2017 at 7:00 am

The appeal of embedding an FPGA IP in an ASIC design is undeniable. For much of your design, you want all the advantages of ASIC: up to GHz performance, down to mW power (with active power management), all with very high levels of integration with a broad range of internal and 3[SUP]rd[/SUP]-party IP (analog/RF, sensor fusion, image/voice… Read More