EDA Acquisition to Drive SoC realization

EDA Acquisition to Drive SoC realization
by Pawan Fangaria on 06-08-2015 at 8:00 pm

A week ago I was reading an article written by Daniel Nenni where he emphasised about semiconductor acquisitions to fuel innovation. We would see that in a larger space, not only in semiconductor and FPGA manufacturing companies (e.g. Intel and Altera) but also in the whole semiconductor ecosystem. If we see it from technical perspective,… Read More


Automatic RTL Restructuring: A Need Rather Than Convenience

Automatic RTL Restructuring: A Need Rather Than Convenience
by Pawan Fangaria on 08-22-2014 at 5:00 pm

In the semiconductor design industry, most of the designs are created and optimized at the RTL level, mainly through home grown scripts or manual methods. As there can be several iterations in optimizing the hierarchy for physical implementation, it’s too late to do the hierarchical optimizations after reaching the floor plan… Read More


Derivative Designs Need Tools Too

Derivative Designs Need Tools Too
by Paul McLellan on 06-18-2013 at 11:58 am

Image RemovedIncreasingly, SoC designs consist of assembling blocks of pre-designed IP. One special case is the derivative design where not just the IP blocks get re-used but a lot of the assembly itself. For example, in the design below some blocks are added, some blocks are updated, some hierarchy is changed. But the bulk of the… Read More


SoC Derivatives Made Easier

SoC Derivatives Made Easier
by Paul McLellan on 03-01-2013 at 2:44 pm

Almost no design these days is created from scratch. Typical designs can contain 500 or more IP blocks. But there is still a big difference between the first design for a new system or platform, and later designs which can be extensively based on the old design. These are known as derivatives and should be much easier to design since… Read More