Exclusive Sneak Peek: Cadence at TSMC OIP Ecosystem Forum 2012

Exclusive Sneak Peek: Cadence at TSMC OIP Ecosystem Forum 2012
by Daniel Nenni on 10-05-2012 at 8:37 am

The TSMC Open Innovation Platform® (OIP) Ecosystem Forum brings TSMC’s design ecosystem member companies together to share with our customers real-case solutions for customers’ design challenges and success stories of best practice in TSMC’s design ecosystem. More than 90% of the attendees last year said “this… Read More


A Brief History of RTDA

A Brief History of RTDA
by Paul McLellan on 10-05-2012 at 7:06 am

Andrea Casotto, the CEO of RTDA, started the company in Alameda in 1995, initially by himself, to market the FlowTracer software technology.

The early version of the technology was created as part of his PhD thesis at UC Berkeley, when Andrea sought automated ways to help engineering students who were having problems using EDA … Read More


EDA User: Rafaela Novais from TowerJazz Semi

EDA User: Rafaela Novais from TowerJazz Semi
by Daniel Payne on 10-04-2012 at 8:10 pm

While reading an article on DeepChip I found an interesting comment from Rafaela Novais, a Design Support Manager at TowerJazz Semi and decided to interview her to learn more about her experience as an IC designer and EDA tool user.

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High Frequency Analysis of IC Layouts

High Frequency Analysis of IC Layouts
by Daniel Payne on 10-03-2012 at 12:26 pm

IC designers of passive devices often use empirical approaches to perform High Frequency Analysis (HFA), however there is at least one new approach being offered by Mentor Graphics using a tool flow of:

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Dimensions of Electronic Design Seminars

Dimensions of Electronic Design Seminars
by Paul McLellan on 10-02-2012 at 6:37 pm

ANSYS and Apache are putting on a new series of seminars about designing future electronic systems. These are only getting more complex, of course, cramming more and more functionality into smaller portable devices with good battery life (and not getting too hot), integrating multiple antennas into a single platform, and TSV-based… Read More


Cooley on Synopsys-EVE

Cooley on Synopsys-EVE
by Paul McLellan on 10-02-2012 at 7:56 am

John Cooley has an interesting “scoop” on the Synopsys-EVE acquisition. The acquisition itself is not a surprise, it is the one big hole in Synopsys’s product line and EVE is the perfect plug to fill it. It was also about the only thing Cadence has (apart from PCB) that Synopsys does not.

The interesting thing … Read More


Converge in Detroit

Converge in Detroit
by Paul McLellan on 09-30-2012 at 10:04 pm

When I worked for VaST we went to a show that I’d never heard of in EDA: SAE Convergence (SAE is the Society of Automotive Engineers). It is held once every two years and it focuses on transportation electronics, primarily automotive although there did seem to be some aerospace stuff there too. This is an even year, Convergence… Read More


Variation at 28-nm with Solido and GLOBALFOUNDRIES

Variation at 28-nm with Solido and GLOBALFOUNDRIES
by Kris Breen on 09-27-2012 at 9:00 pm

At DAC 2012 GLOBALFOUNDRIES and Solido presented a user track poster titled “Understanding and Designing for Variation in GLOBALFOUNDRIES 28-nm Technology” (as was previously announced here). This post describes the work that we presented.

We set out to better understand the effects of variation on design at 28-nm. In particular,… Read More


A Brief History of Atrenta and RTL Design

A Brief History of Atrenta and RTL Design
by Daniel Nenni on 09-26-2012 at 7:41 pm

We’re plagued by acronyms in this business. Wikipedia defines RTL as follows: “In digital circuit design, register-transfer level (RTL) is a design abstraction which models a synchronous digital circuit in terms of the flow of digital signals (data) between hardware registers, and the logical operations performed on those… Read More