16nm HBM Implementation Presentation Highlights CoWoS During TSMC’s OIP

16nm HBM Implementation Presentation Highlights CoWoS During TSMC’s OIP
by Tom Simon on 09-29-2016 at 12:00 pm

Once a year, during the TSMC’s Open Innovation Platform (OIP) Forum you can expect to see cutting edge technical achievements by TSMC and their partners. This year was no exception, with Open-Silicon presenting its accomplishments in implementing an HBM reference design in 16nm. It’s well understood that HBM offers huge benefits… Read More


Optimizing memory scheduling at integration-level

Optimizing memory scheduling at integration-level
by Don Dingee on 04-04-2016 at 4:00 pm

In our previous post on SoC memory resource planning, we shared 4 goals for a solution: optimize utilization and QoS, balance traffic across consumers and channels, eliminate performance loss from ordering dependencies, and analyze and understand tradeoffs. Let’s look at details on how Sonics is achieving this.… Read More


Advances in DDR IP Solution for High-Performance SoCs

Advances in DDR IP Solution for High-Performance SoCs
by Pawan Fangaria on 12-02-2015 at 7:00 am

In this era of high-performance, low-power, and low-cost devices coming up at an unprecedented scale, the SoCs can never attain the ultimate in performance; always there is scope for improvement. Several methods including innovative technology, multi-processor architecture, memory, data traffic management for low latency,… Read More


IoT need Low-cost, Low-power…and Silicon Proven IP

IoT need Low-cost, Low-power…and Silicon Proven IP
by Eric Esteve on 09-30-2015 at 4:00 pm

Today, IoT devices are available in our daily life through wearable, smart appliances or metering application and some prediction call for 33 billion connected objects, 25 billion being IoT by 2020 (Gartner, 2014). Being very synthetic, IoT device (smart appliance or wearable object) will be wirelessly and securely connected… Read More


SmartDV at DAC and More

SmartDV at DAC and More
by Pawan Fangaria on 07-02-2015 at 7:00 am

As we are aware about SmartDV Technologies, a fast emerging company in IP space with offices in Bangalore and San Diego, its booth in 52ndDACwas located at a prominent position in front of DAC Pavilion on the exhibits floor. So, most of the crowd coming to attend sessions in DAC Pavilion had a glimpse of SmartDV. I met Deepak Kumar TalaRead More


Synopsys Vision on Custom Automation with FinFET

Synopsys Vision on Custom Automation with FinFET
by Pawan Fangaria on 06-26-2015 at 7:00 am

In an overwhelmingly digital world, there is a constant cry about the analog design process being slow, not automated, going at its own pace in the same old fashion, and so on. And, the analog world is not happy with the way it’s getting dragged into imperfect automation so it can be more like the digital world. True, the analog world… Read More


Accelerate Modern PCB Design and Manufacturing

Accelerate Modern PCB Design and Manufacturing
by Pawan Fangaria on 05-24-2015 at 12:00 pm

In modern electronic industry PCBs are required to accommodate highly dense circuits with large number of components and complex routing spaces. While the complexity is increasing, the time-to-market is decreasing. In such a scenario, there is no other option than to reduce the design time by employing innovative editing options… Read More


Successful Venture of an Indian Global VIP Company

Successful Venture of an Indian Global VIP Company
by Pawan Fangaria on 04-17-2015 at 10:00 am

It’s rare that we find a truly Indian-based company operating globally in the semiconductor space. Although the ‘gold rush’ towards IP development in the last decade initiated many IP start-ups in India, today we rarely find Indian IP company names which are shining in the global arena. The story of services companies is different,… Read More


Prototyping Kits to Accelerate IP Development & Integration into SoCs

Prototyping Kits to Accelerate IP Development & Integration into SoCs
by Pawan Fangaria on 01-04-2015 at 10:00 am

With growing SoC size, complexity, software and hardware content in it and shrinking time-to-market, the SoC design completion in time has become increasingly dependent on IP which need to be sourced (internally or externally), customized according to the design need and integrated together into the SoC. While IP providers… Read More


Optimize Your Interconnect & Design at System Level for Best Results

Optimize Your Interconnect & Design at System Level for Best Results
by Pawan Fangaria on 09-16-2014 at 7:00 am

As the SoC design size, complexity and functionality keeps on increasing with multiple IPs packed together and design time and time-to-market keeps on decreasing amid critical constraints on PPA, there is no other alternative than to do the design first-time-right not to miss the window of opportunity. And that could be possible… Read More