Podcast EP209: Putting Soitec’s Innovative Substrates to Work in Mainstream Products with Dr. Christophe Maleville

Podcast EP209: Putting Soitec’s Innovative Substrates to Work in Mainstream Products with Dr. Christophe Maleville
by Daniel Nenni on 02-23-2024 at 10:00 am

Dan is joined by Dr. Christophe Maleville, chief technology officer of Soitec’s Innovation. He joined Soitec in 1993 and was a driving force behind the company’s joint research activities with CEA-Leti. For several years, he led new SOI process development, oversaw SOI technology transfer from R&D to production and managed… Read More


CEO Interview: Coby Hanoch of Weebit Nano

CEO Interview: Coby Hanoch of Weebit Nano
by Daniel Nenni on 09-30-2022 at 6:00 am

Weebit Nano Coby Hanoch Smaller2

Coby Hanoch comes to Weebit Nano with 15 years’ experience in engineering and engineering management and 26 years’ experience in sales management and executive roles. Coby was Vice President Worldwide Sales at Verisity where he was part of the founding team and grew the company to over $100M in annual sales which facilitated its… Read More


Semicon West 2019 – Day 2

Semicon West 2019 – Day 2
by Scotten Jones on 07-18-2019 at 10:00 am

Tuesday July 9th was the first day the show floor was open at Semicon. The following is a summary of some announcements I attended and general observations.

AMAT Announcement

My day started with an Applied Materials (AMAT) briefing for press and analysts where they announced “the most sophisticated system they have ever released”.… Read More


FDSOI Status and Roadmap

FDSOI Status and Roadmap
by Scotten Jones on 07-23-2018 at 7:00 am

FDSOI is gaining traction in the market place. At their foundry forum in May, Samsung announced they have 17 FDSOI products in high volume manufacturing (you can read Tom Dilliger’s write up of the Samsung Foundry Forum here). At SEMICON West in July, GLOBALFOUNDRIES (GF) announced FDSOI design wins worth $2 billion dollars in … Read More


CEO Interview: Marie Semeria of LETI

CEO Interview: Marie Semeria of LETI
by Eric Esteve on 10-13-2016 at 12:00 pm

Marie Semeria of LETI

Laboratoire d’électronique des technologies de l’information (LETI) is a French research center, affiliate to the CEA (Commisariat a l’Energie Atomique). Since LETI creation in 1967, this affiliation has two consequences, the money was flowing from the deep pocket of the atomic industry to sustain advanced … Read More


Electrical-Optical Design, A Bridge to Terabitsia

Electrical-Optical Design, A Bridge to Terabitsia
by Mitch Heins on 07-19-2016 at 12:00 pm

If you don’t get the tongue in cheek reference of the title, you probably don’t have children who liked to watch Disney movies. All four of my daughters loved Disney and so, I am forever shaped by the Wonderful World of Disney. In 2007 Disney adapted to the screen a novel called, ‘A Bridge to Terabithia’, in which two adolescents escape… Read More


Silicon Photonics – Back to the Future – Part Deux?

Silicon Photonics – Back to the Future – Part Deux?
by Mitch Heins on 04-10-2016 at 8:00 pm

I cut my teeth in silicon IC design at Texas Instruments during the early 1980’s working on what would eventually become the ASIC and Fabless IC industries that enabled the explosive growth of the electronics industry over the last three decades. Of late I’ve become involved in the silicon photonics space and I am getting an incredible… Read More


IEDM 2015 Blogs – Part 1 – Overview

IEDM 2015 Blogs – Part 1 – Overview
by Scotten Jones on 12-11-2015 at 7:00 am

The International Electron Devices Meeting (IEDM) is one of, if not the premier conference for semiconductor process technology. The 2015 meeting just finished up on Wednesday, December 9th.

This year’s meeting was held from Saturday, December 5[SUP]th[/SUP] through Wednesday, December 9[SUP]th[/SUP] in Washington DC.… Read More


IEDM: FD-SOI Down to 10nm

IEDM: FD-SOI Down to 10nm
by Paul McLellan on 01-03-2015 at 1:48 pm

The big picture is that planar semiconductor transistors don’t really work below 20nm. The reason is that the gate does a poor job of controlling the channel since too much channel is too far from the gate and so there is a lot of leakage even when the transistor is nominally off. So the channel needs to be made thinner. One way … Read More


Early Thermal and Power Simulation Using Virtual Prototyping for Pedestrian Detection Applications

Early Thermal and Power Simulation Using Virtual Prototyping for Pedestrian Detection Applications
by Daniel Payne on 12-30-2013 at 5:00 am

In the 1970’s we designed ICs first and when silicon came back then we measured the power and junction temperature. At that time there were no EDA simulation tools or models for full-chip power and temperature analysis. Fast forward to 2013 and we find that temperature and power are still demanding requirements for MPSoC … Read More