Early Thermal and Power Simulation Using Virtual Prototyping for Pedestrian Detection Applications

Early Thermal and Power Simulation Using Virtual Prototyping for Pedestrian Detection Applications
by Daniel Payne on 12-30-2013 at 5:00 am

In the 1970’s we designed ICs first and when silicon came back then we measured the power and junction temperature. At that time there were no EDA simulation tools or models for full-chip power and temperature analysis. Fast forward to 2013 and we find that temperature and power are still demanding requirements for MPSoC … Read More


When Atrenta celebrates with STM and CEA-Leti in Grenoble

When Atrenta celebrates with STM and CEA-Leti in Grenoble
by Eric Esteve on 07-01-2013 at 3:20 am

Grenoble is French city well-known within the Semiconductor industry to be one of the last location counting wafer fabs, not only in France but in fact in Europe. Back in the 70’s, under French government impulse, through the Commisariat à l’Energie Atomique (CEA) and the LETI subsidiary in charge of Electronic related research,… Read More