At the TSMC Technology Symposium last month Suk Lee presented a lot of information on design enablement. Suk is an interesting guy with a unique background in ASIC, Semiconductor, EDA, and now Foundry. In baseball terms that would be like playing infield, outfield, home plate, and umpire!
Around the turn of the millennium Suk actually… Read More
Sure, design engineers can get more attention than verification engineers, but the greater number of verification engineers on SoC projects means that the verification task is a bigger bottleneck in a schedule than pure design work. A recent survey conducted at Cadence shows how verification effort can be divided into several,… Read More
In last 30+ years, the electronic design industry has seen rapid changes more than any other industry. The change has taken place in the whole electronic ecosystem including semiconductor technology, transistor design, IC / SoC design, PCB, and system design. Today, a PCB can be very complex connecting several heterogeneous… Read More
Verification in general suffers from a couple of fundamental problems. Availability of models and performance of different levels of representation.
The first problem, availability of models, is that you would like to start verification as soon as possible but all the representations are not ready early enough. Obviously … Read More
IP vendors always try to create differentiation, especially when designing protocol based IP. You can differentiate by building the most performing controller but you will probably miss the expectation of these customers who don’t search for performance but just compliance to a specific standard. Or the vendor may want to design… Read More
On Tuesday Cadence made a big announcement about their new physical implementation offering, Innovus, during the keynote address at the CDNLive event in Silicon Valley. Cadence CEO Lip-Bu Tan alluded to it during his kick off talk, and next up Anirudh Devgan, Senior Vice President, Digital & Signoff Group, filled in more … Read More
Yesterday was the first day of CDNLive. There were three keynotes. The first was by Lip-Bu Tan, Cadence’s CEO (and the Chairman of Walden International that he will be the first to remind you). The most interesting tidbit was that Cadence now has over 1000 people working on IP and that it represents 11% of their revenue. Then… Read More
Apparently that is the case. Honestly my choice would have been Mentor but I can easily make an argument for Cadence based on my discussions with the foundries and their top customers but more on that later.
Fortune Magazine last week added Cadence to the 2015 list of “100 Best Companies to Work For” citing a cultural transformation… Read More
As big of a fan as I am of Social Media there is still nothing like getting up close and personal when collaborating with the fabless semiconductor ecosystem. After 30+ years in Silicon Valley if there is one thing I have learned it’s that “showing up” is the #1 key to success, absolutely.
Speaking of showing up, each year there are three… Read More
High Level Synthesis (HLS) tools have been around for at least two decades now, and you may recall that about one year ago Cadence acquired Forte. The whole promise of HLS is to provide more design and verification productivity by raising the design abstraction from RTL code up to SystemC, C or C++ code. With any acquisition it is natural… Read More
