Day 1 of the SPIE conference featured a number of customer updates on the status of their EUV programs. On Tuesday morning we got to hear ASML’s update on their work.… Read More
Tag: 7nm
TSMC and Intel on the Long Road to EUV
Today is the first day of the SPIE Advanced Lithography Conference and Extreme Ultraviolet (EUV) updates were a big focus.… Read More
Coventor ASML IMEC: The last half nanometer
On Tuesday evening December 8[SUP]th[/SUP] at IEDM, Coventor held a panel discussion entitled the “The last half nanometer”. Coventor is a leading provider of simulation software used to design processes. This is my third year attending the Coventor panel discussion at IEDM and they are always excellent with very strong panels… Read More
ARM on Moore’s Law at 50: Are we planning for retirement?
On Monday morning on December 7, 2016 Greg Yeric of Arm gave an excellent and wide ranging plenary talk at IEDM entitled “Moore’s Law at 50: Are we planning for retirement?”. You can download Greg’s slide deck here.… Read More
GlobalFoundries Visit – Part 1 – It’s All About Execution
Fabless companies and the need for foundries
The success of fabless semiconductor companies is well documented with companies such as Qualcomm, Broadcom, MediaTek, AMD, Avago and others selling semiconductors made using the fabless model (see Fabless: The Transformation of the Semiconductor Industry by Daniel Nenni and … Read More
Xilinx Skips 10nm
At TSMC’s OIP Symposium recently, Xilinx announced that they would not be building products at the 10nm node. I say “announced” since I was hearing it for the first time, but maybe I just missed it before. Xilinx would go straight from the 16FF+ arrays that they have announced but not started shipping, and to the… Read More
SEMI SMC: Atoms Still Don’t Scale
Last Tuesday was the SEMI’s annual Strategic Materials Conference (SMC). The opening keynotes were given by Gary Patton, the CTO of GlobalFoundries, and Mark Thirsk, Managing Partner of Linx Consulting. This year it was held in the Computer History Museum (which always makes the commute interesting since you have to fight… Read More
TSMC OIP: What to Do With 20,000 Wafers Per Day
Today it is TSMC’s OIP Ecosystem Innovation forum. This is an annual event but is also a semi-annual update on TSMC’s processes, investment, volume ramps and more. TSMC have changed the rules for the conference this year: they have published all the presentations by their partners/customers. Tom Quan of TSMC told… Read More
SEMICON West 2015 Recap – Day 1 – Softening Markets, Sub 14nm and 3D NAND
Tuesday morning press briefing
The show started for me Tuesday morning with the SEMI press briefing. SEMI said there are 1,200 booths this year, 629 exhibiting companies and over 180 hours of programming. They also said pre-registration was up from last year and they expect 26,000 visitors.
Dan Tracy then gave an update on the markets.… Read More
Who Needs to Lead at the 14, 10 and 7nm nodes
IBM recently disclosed a working 7nm test chip generating a lot of excitement in the semiconductor industry and also in the mainstream media. In this article I wanted to explore the 14nm, 10nm and 7nm nodes, the status of the key competitors at each node and what it may mean for the companies.