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If you look real close at the #49 DAC floor plan you will see the tiny Intel booth dwarfed by those of TSMC, GlobalFoundries, Samsung, and ARM. The number one semiconductor company in the world does not have the budget for the cornerstone conference of the semiconductor ecosystem? Oh my…… Intel has a big foundry hat and no cattle… Read More
You can see a lot just by looking – as Yogi Berra was quoted as saying. The past two weeks we have seen quite a bit that adds intrigue to the true nature of Qualcomm’s 28nm product shortage and how the effects will ripple through the mobile industry for the second half of 2012. Samsung’s bold announcement of their Galaxy S III smartphones… Read More
Now that the 28nm challenges are dead
It is time to look ahead
The tabloid pundits may not agree
But Moore’s law again you will see
The semiconductor ecosystem is humming
(2X gate density -20%+ performance-20%+ power savings)
The 20nm design starts are coming!
Okay, I’m really bad at poetry. Gambling however, I do pretty well. Las… Read More
What’s new with Glofo? Quite a bit actually. It was interesting to see a Made in America: Global Companies Expand in U.S. Towns segment on semiconductors! Give it a look, I enjoyed it. It’s an election year, jobs are key to any election, so it did not surprise me to see President Obama making the rounds:… Read More
While the debate rages on about 28nm yield at foundry juggernaut TSMC, on Monday I attended a webinar on 20nm IC design hosted by TSMC and Synopsys. Double Patterning Technology (DPT) becomes a requirement for several layers of your 20nm IC design which then impact many of your EDA tools and methodology.… Read More
There is an interesting discussion in the SemiWiki forum in response to the EETimes article: Intel exec says fabless model ‘collapsing’. Definitely an interesting debate, one worth our time since the advertising click hungry industry pundits will certainly jump all over it. Clearly I’m biased since I helped build… Read More
The previous post in this series provided an overview of FinFET devices. This article will briefly cover FinFET fabrication.
The major process steps in fabricating silicon fins are shown in Figures 1 through 3. The step that defines the fin thickness uses Sidewall Image Transfer (SIT). Low-pressure chemical vapor (isotropic)… Read More
In every Intel product announcement and PR event, there are hours of behind the scenes meetings to discuss what they should introduce, what are the messages and what are the effects on the marketplace to maximize the impact of the moment. The Ivy Bridge product release speaks volumes of what they want to accomplish over the coming… Read More
TSMC just finished theQ1 conference call. I will let the experts haggle over the wording of the financial analysis, but the big news is that TSMC 28nm Q1 revenue was 5%, beating my guess of 4%. So all of you who bet against TSMC 28nm it’s time to pay up! Coincidentally, I’m in Las Vegas where the term deadbeat is taken literally!
Per my … Read More
For a long time Cisco had a very high end product whose official internal name during its years of development was HFR, which stood for Huge F***ing Router (the marketing department insisted it stood for ‘fast’). Eventually it got given a product number, CRS-1, but not before I’d read an article about it in the… Read More
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