GlobalFoundries Endorse ST/LETI FD-SOI 22nm!

The LETI days and the associated FD-SOI workshop took place in Grenoble (France) last week and I could not attend in person… but I had the opportunity to speak with LETI CEO Marie Semaria. Before going into details into the 3 key messages from the LETI (FD-SOI, Silicon Impulse and Cool Cube), it’s important to share the great news from this FD-SOI workshop: GlobalFoundries has officially presented their FD-SOI 20nm solution! The first three (business oriented) presentation have opened the second day, I think that the company list is already a good summary:

• 28FD-SOI: Cost effective low power solution for long lived 28 nm (by Kelvin Low – Samsung)
• Advances in Application and Ecosystem for the FD-SOI Technology (by Giorgio Cesana – ST)
• Design/technology Co-Optimization for FD-SOI (by Teepe Gerd – GF)

ST and Samsung supporting FD-SOI is no more a breaking news even if it’s really important that a foundry offering huge wafer capacity like Samsung is part of the game. Beside the title of the presentation from GF, the breaking news is that GF will support 20 (or 22)nm FD-SOI. Why 20nm and not 28nm? This is probably a marketing decision: GF has decided to officially support FD-SOI technology more than one year after Samsung, endorsing 20nm FD-SOI instead of 28nm is a good way to fill this timing gap… The LETI is a French research center concentrating on advanced technology research (not expected to lead to profitable products before many years) the goal being to license such technology to the industry. The excellent presentation from Thomas Stotnicki, ST Fellow and Technical VP, clearly shows that it may take long time for a lab demonstrated technology like FD-SOI to eventually become an industry product: from 1988 to 2012 in this case! FD-SOI being endorsed by both Samsung and GF is clearly a success for the LETI. From the discussion with LETI CEO Marie Semaria I can synthesize three key messages passed by the LETI during this LETI days in Grenoble:

• FD-SOI being licensed by Samsung (28nm), ST (28nm, 14nm) and GF (22nm) is extremely well positioned to support emerging IoT applications, especially Memories, RF IC and MEMS
• To support wider FD-SOI adoption, including start-up and mid-size European chip makers, the LETI has launched the “Silicon Impulse” initiative to strengthen FD-SOI Ecosystem: EDA, IP or MPW
• Another initiative, “Cool Cube”, has been launched by the LETI to support monolithic 3D, or CMOS on CMOS integration.

Marie Semaria, LETI CEO, considers that the FD-SOI technology should target in priority the IoT applications, thanks to better than bulk power efficiency (IoT loves low power!) and good enough integration capability at 28nm or even 22nm with GF. I completely agree with Marie when she says that Moore’s law explodes at 28nm: as soon as a new technology leads to higher cost per transistor (like 14nm compared with 22nm), the industry has to explore various innovative approaches to keep semiconductors as attractive as it has been during the last 50 years. Exploring the 3[SUP]rd[/SUP] dimension is one of these innovative possibilities. In fact “one” is not the right word, as different 3D technologies are in development, like Through Silicon Via (TSV) or sequential integration based on Cool Cube process developed at LETI. The undisputed fabless #1 leader, also leading the smartphone segment with Modem and Application Processor IC has not endorsed FD-SOI… but Qualcomm has decided to run a partnership with LETI in order to bring CoolCube into production. What’s CoolCube? The idea is to use a chip initially processed (say an Application Processor) as the bulk to process a 2[SUP]nd[/SUP] chip (say a Modem or a Memory for example). Once this 2[SUP]nd[/SUP] chip is processed, both chips will be interconnected by using bond wires (not TSV) and eventually packaged together. The benefits are smaller area (on the board) and better power consumption than compared with two IC packaged separately. In fact, the internal chip to chip interconnect are minored of package capacitance and inductance, leading to lower overall capacitance, thus lower power consumption (proportional to C*V[SUP]2[/SUP]). CoolCube looks very attractive and the chance for this emerging technology to reach production is higher with Qualcomm being the customer/driver. Silicon Impulse is obviously not impressive as CoolCube… but probably very important as well. The goal is to create complete FD-SOI Ecosystem including EDA tools, IP offer and Multi Project Wafer (MPW) capabilities. Silicon Impulse is supposed to help start-up and emerging chip makers to complete their first FD-SOI project but creating a real Ecosystem will eventually benefit to every chip makers adopting FD-SOI. From Eric Esteve from IPNEST