Usually I sleep on long flights, if not, I watch movies and read. The Lincoln movie was playing on EVA Air this week which reminded me that Abraham Lincoln was one of the greatest U.S. Presidents. If I was asked to pick a U.S. President as a spokesperson for TSMC it would be Honest Abe Lincoln. Chairman Morris Chang said it best during … Read More
VSORA’s Sandra Rivera on the Inference Era: Demand Is Real, But Not Everyone SurvivesSandra Rivera, Chair of VSORA, joined Bloomberg’s The…Read More
Intel’s Open Software Blueprint: Why Production AI Needs More Than GPUsIntel’s strategic argument about enterprise AI is that…Read More
CTO Interview with Dr. Zakir Syed of ClockEdgeDr. Zakir Syed is Co-founder and Chief Technology…Read More
Overcoming the Edge AI Power Wall with Low-Voltage Foundation IPAs artificial intelligence (AI) workloads migrate to endpoint…Read More
Keysight Advances its Design Software with Agentic AIKeysight Technologies is opening a new route for…Read MoreWally Rhines: Name That Graph!
Wally Rhines gave the keynote at DVCon yesterday. He started out with a game of “name that graph” which was unfortunately a bit spoiled since when the names were revealed the first line was off the top of the screen. But he extrapolated several trends such as the decreasing number of fabs (the current trend is that there… Read More
Shrinking audio creates issues and opportunities
There is a lot more to sound than meets the ear, and there a vast number of ways to deliver an audio experience. I recently trashed my gaming headset, replacing it with a Samson C03U mic and Audio-Technica ATH-PRO700MK2 headphones. It’s a huge upgrade, especially for podcasting, and I admit I was also motivated by research into digital… Read More
High and Low: High Level Synthesis and Low Power
It is so widely accepted that it is already a cliche to say that “power is the new timing.” With more and more chips, the major challenge is not so much to meet timing but to meet timing without blowing out the power budget. Otherwise, you could just crank up the clock rate.
I’m going to be lazy so you can insert your … Read More
Intel and Altera Sign on for 14nm
The announcement today that Intel will be a Foundry for Altera at 14nm is a significant turning point for the Semiconductor Industry and Intel’s Foundry fortunes of which the full ramifications are not likely to be understood by analysts. As a long time follower of Intel and a former co-founder of an FPGA startup (Cswitch), it has… Read More
Can Japan Regain Semiconductor Leadership?
In the 1980s, Japan was seen as the leader in the semiconductor industry. Their quality was higher, especially in memories, and the US was worried about falling behind. In fact Sematech was created in 1987 by the US government and a consortium of 14 US-based semiconductor companies primarily to pool investment on common problems… Read More
The New "Mobile Foundry" Era: Whose Wheelhouse?
Nothing seems to raise the Visceral Ire of Semiwiki readers like the two words: Intel and Foundry. To get maximum steam coming out of the ears make sure you combine the two words in a sentence. Something along the lines like: Intel is Now Going to be a Leader in the Foundry Business. Pause…..Ok catch your breadth and now let’s move on … Read More
Who Allegedly Broke Tela’s Patents: Is Samsung or Qualcomm the Real Villain?
I recently blogged about the actions filed by Tela Innovations at both the US International Trade Commission (USITC) and in federal district court. Those actions allege that five mobile phone manufacturers -HTC, LG, Motorola Mobility, Pantech, and Nokia – were importing handsets into the US which infringed on seven of… Read More
Learning Properties, Assertions and Covers for Hardware Design
How do you learn new hardware design topics? I just got trained online about property-based verification for hardware designers using a free online class at Aldec. The material was created by Jerry Kaczynski, a Research Engineer at Aldec.
FinFET Design Challenges at 14nm and 10nm
At DAC 2012 we were hearing about the 20nm design ecosystem viability, however IC process technology never stands still so we have early process development going on now at the 10nm and 14nm nodes where FinFET technology is being touted. Earlier in February Vassilios Gerousis, a distinguished engineer at Cadence presented a session… Read More


Maskless EUV Lithography: An Alternative to E-Beam