Improve Precision of Parasitic Extraction for Digital DesignsBy Mark Tawfik Parasitic extraction is essential in…Read More
Perforce at DAC, Unifying Software and Silicon Across the EcosystemAs the new name reflects, chip and system…Read More
Double SoC prototyping performance with S2C’s VP1902-based S8-100As AI, HPC, and networking applications demand ever-higher…Read More
CEO Interview with Dr. Maksym Plakhotnyuk of ATLANT 3DDr. Maksym Plakhotnyuk, is the CEO and Founder…Read More
As SoC design has transformed from being about writing RTL and more towards IP assembly, the issue of IP quality has become increasingly important. In 2011 TSMC and Atrenta launched the soft IP qualification program. Since then, 13 partners have joined the program.
IP quality is multi-faceted but at the most basic level, an IP block… Read More
Intel is the number one semiconductor company in the world and has taken the lead in bringing FinFET (aka Tri-Gate) silicon to market at the 22nm node starting in May 2011, so now we see the pure play foundries playing catch-up and start talking about their own FinFET roadmaps. IC designers and layout engineers want to know how their… Read More
Confused by the way a ReRAM cell behaves? Looking for a clear definition of the various terms used? Then check out Blogs at ReRAM-Forum.com. on recent publications appearing in the IEEE journals. The latest Blog discusses a paper published by Professor Daniele Ielmini of the Politecnico di Milano in Italy on the Resistive Switching… Read More
When a company develops chip for the military industry, I would prefer these chips to be using a 100% reliable technology. I am sure that you too! For certain application, 99%, or even 99.99% rate of confidence is not enough. Would you accept to fly in an airplane if you still have 1 out of 10,000 chances to crash? Would you accept living… Read More
It’s all about the silicon. It’s all about silicon correlation. TSMC Open Integration Platform should be renamed TSMC Silicon Correlation Platform or TSMC SCP. One of the problems I have with EDA technical papers today is that they are not silicon based. Anybody can put up slides with marketing sparkles on them but if you want qualified… Read More
The TSMC Open Innovation Platform® (OIP) Ecosystem Forum brings TSMC’s design ecosystem member companies together to share with our customers real-case solutions for customers’ design challenges and success stories of best practice in TSMC’s design ecosystem.
More than 90% of the attendees last year said “this… Read More
Coming up are ANSYS/Apache seminars on Dimensions of Electronic Design. Watch the video where Arvind Shanmugavel gives some details about why you should attend. Probably most readers are in Silicon Valley, and the seminar here is on 18th at the Hyatt (next to Santa Clara convention center).
The seminars are free to qualified attendees.… Read More
DAC’s technical program offers the best-in-class solutions that promise to advance Electronic Design Automation (EDA) and Embedded Systems and Software (ESS). DAC 2013 is seeking submissions that deal with design technologies and algorithms, addressing all aspects of electronic design across several submission categories.… Read More
The TSMC Open Innovation Platform® (OIP) Ecosystem Forum brings TSMC’s design ecosystem member companies together to share with our customers real-case solutions for customers’ design challenges and success stories of best practice in TSMC’s design ecosystem. More than 90% of the attendees last year said “this… Read More
Andrea Casotto, the CEO of RTDA, started the company in Alameda in 1995, initially by himself, to market the FlowTracer software technology.
The early version of the technology was created as part of his PhD thesis at UC Berkeley, when Andrea sought automated ways to help engineering students who were having problems using EDA … Read More
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