Smartphones are smart but they are about to get smarter. The next big thing in mobile phones is to have a rich sensor environment: proximity, temperature and humidity, atmospheric pressure, light color, cover, gyroscope, magnetometer, accelerometer, ambient light, gesture and more. Some of these are already here, of course,… Read More
NVIDIA Brings Agentic AI Toolkit to EDANVIDIA’s expansion of the NVIDIA Agent Toolkit with…Read More
Synopsys and Intel Foundry Enable System-Level Design on Intel 14ASynopsys and Intel Foundry are expanding their collaboration…Read More
DAC 2026: How Undo Makes AI for Chip Design Work BetterDAC was abuzz this year with new AI-fueled…Read More
ChipAgent Raises $134Million and Why it MattersIn my 45 years experience in the semiconductor…Read More
CEO Interview with Brendan Emery of iQ SenseBrendan Emery is Co-Founder and Chief Executive Officer…Read MoreHow Asia Works, phase 1
This is not too much about semiconductors so consider this an “off-topic” warning. But I think you should read on anyway.
TSMC will show up eventually but not yet.
I was in Asia at last week. Coincidentally, I had a book to read on the plane called How Asia Works by Joe Studwell. It looks at what has made Japan, Korea, Taiwan… Read More
Yes, Intel 14nm Really is Delayed…And They Lost $600M on Mobile
Intel server profits are growing, which isn’t a big suprise. But mobile losses are high. Although the amount lost by the Other Intel Architecture Group had a loss of $606M, that is actually down slightly from Q2 but up a lot from last year when they lost “only” $235M. This group includes Atom, the Infineon Wireless… Read More
Assertions verifying blocks to systems at Broadcom
Speaking from experience, it is very difficult to get an OEM customer to talk about how they actually use standards and vendor products. A new white paper co-authored by Broadcom lends insight into how a variety of technologies combine in a flow from IP block simulation verification with assertions to complete SoC emulation with… Read More
An ASIC Design Flow at LSI
Harish Aepalais part of the Design Closure Methodology group at LSIand he recently talked about his ASIC handoff experience in a webinar. Harish works with logic and physical synthesis, timing constraints, RTL analysis and formal verification.
One challenge with ASIC handoff has been getting through design closure with the… Read More
SEMI Smart Technology Conference
I should start by saying that SEMI Smart Technology is not technology that is only half as smart as our phones, it is a conference on smart technology organized by SEMI. Officially it is called the International Technology Partners Conference with a sort of subtitle of From Smart Cars to Smart Cities: Shaping the Future of Microelectronics… Read More
Layout-based ESD Checking Methodology at Nvidia
The company Nvidiais synonymous with designing all things video and GPU, so I watched Ting Ku, director of engineering at an archived webinar today talk about: Comprehensive Layout-based ESD Check Methodology with Fast Full-chip Static and Macro-level Dynamic Solutions.… Read More
Enter the Warrior
Since Imagination’s acquisition of MIPS at the end of last year, the MIPS product line has been given a new lease of life. There are two things driving this. The first is simply that with its new home, the MIPS architecture has a solid future whereas before it was uncertain. Secondly, Imagination moved their own general purpose… Read More
History of SoC Interconnect Fabric
I just read this very interesting article posted by Kurt Shuler from Arteris, describing the “History of SoC Interconnect Fabric” and explaining why the SC industry needs an advanced approach, named the “fourth phase of the Interconnect Fabric history” in the article. Kurt’s point of view is that in the past the SoC interconnect… Read More
Device Noise Analysis of Switched-Capacitor Circuits Webinar
Switched-capacitor (SC) circuits are ubiquitous in CMOS mixed-signal ICs. Thermal noise, introduced by MOS switches and active amplifier circuitry, is the major performance limiter in these circuits. This webinar reviews analysis techniques to accurately analyze the noise performance of switched-capacitor circuits … Read More


ASML’s Path to Lithography Dominance—and the Coming Maskless Revolution